zhengdang.vhd

来自「2FSK调制功能」· VHDL 代码 · 共 13 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity cunchuqi is
   port(
clk:in std_logic;
outclc1,outclc2:out std_logic
);
end cunchuqi;
architecture a of cunchuqi is