📄 zuhe.rpt
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Project Information e:\jia\zuhe.rpt
MAX+plus II Compiler Report File
Version 10.0 9/14/2000
Compiled: 11/21/2008 09:59:01
Copyright (C) 1988-2000 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera. Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner. Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors. No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.
***** Project compilation was successful
** DEVICE SUMMARY **
Chip/ Input Output Bidir Shareable
POF Device Pins Pins Pins LCs Expanders % Utilized
zuhe EPM7128SLC84-15 1 11 0 99 63 77 %
User Pins: 1 11 0
Project Information e:\jia\zuhe.rpt
** PROJECT COMPILATION MESSAGES **
Warning: Symbol "OUTPUT" (ID :22) overlaps another symbol
Warning: Symbol "OUTPUT" (ID :21) overlaps another symbol
Warning: Symbol "OUTPUT" (ID :20) overlaps another symbol
Warning: Symbol "OUTPUT" (ID :19) overlaps another symbol
Warning: Symbol "OUTPUT" (ID :18) overlaps another symbol
Warning: Symbol "OUTPUT" (ID :17) overlaps another symbol
Warning: Symbol "OUTPUT" (ID :16) overlaps another symbol
Warning: Symbol "OUTPUT" (ID :12) overlaps another symbol
Warning: Primitive 'sel' is stuck at GND
Warning: Primitive 'cs' is stuck at GND
Project Information e:\jia\zuhe.rpt
** AUTO GLOBAL SIGNALS **
INFO: Signal 'clk' chosen for auto global Clock
Project Information e:\jia\zuhe.rpt
** PIN/LOCATION/CHIP ASSIGNMENTS **
Actual
User Assignments
Assignments (if different) Node Name
zuhe@83 clk
zuhe@79 cs
zuhe@58 sel
zuhe@75 wave0
zuhe@74 wave1
zuhe@70 wave2
zuhe@69 wave3
zuhe@68 wave4
zuhe@64 wave5
zuhe@65 wave6
zuhe@61 wave7
zuhe@60 wr
Project Information e:\jia\zuhe.rpt
** FILE HIERARCHY **
|da:3|
|da:3|lpm_add_sub:24|
|da:3|lpm_add_sub:24|addcore:adder|
|da:3|lpm_add_sub:24|addcore:adder|addcore:adder0|
|da:3|lpm_add_sub:24|altshift:result_ext_latency_ffs|
|da:3|lpm_add_sub:24|altshift:carry_ext_latency_ffs|
|da:3|lpm_add_sub:24|altshift:oflow_ext_latency_ffs|
|fenpinqi:4|
|fenpinqi:4|lpm_add_sub:39|
|fenpinqi:4|lpm_add_sub:39|addcore:adder|
|fenpinqi:4|lpm_add_sub:39|addcore:adder|addcore:adder0|
|fenpinqi:4|lpm_add_sub:39|altshift:result_ext_latency_ffs|
|fenpinqi:4|lpm_add_sub:39|altshift:carry_ext_latency_ffs|
|fenpinqi:4|lpm_add_sub:39|altshift:oflow_ext_latency_ffs|
|cunchuqi:15|
|jishuqi:23|
|jishuqi:23|lpm_add_sub:214|
|jishuqi:23|lpm_add_sub:214|addcore:adder|
|jishuqi:23|lpm_add_sub:214|addcore:adder|addcore:adder1|
|jishuqi:23|lpm_add_sub:214|addcore:adder|addcore:adder0|
|jishuqi:23|lpm_add_sub:214|altshift:result_ext_latency_ffs|
|jishuqi:23|lpm_add_sub:214|altshift:carry_ext_latency_ffs|
|jishuqi:23|lpm_add_sub:214|altshift:oflow_ext_latency_ffs|
|jishuqi:23|lpm_add_sub:430|
|jishuqi:23|lpm_add_sub:430|addcore:adder|
|jishuqi:23|lpm_add_sub:430|addcore:adder|addcore:adder1|
|jishuqi:23|lpm_add_sub:430|addcore:adder|addcore:adder0|
|jishuqi:23|lpm_add_sub:430|altshift:result_ext_latency_ffs|
|jishuqi:23|lpm_add_sub:430|altshift:carry_ext_latency_ffs|
|jishuqi:23|lpm_add_sub:430|altshift:oflow_ext_latency_ffs|
|jishuqi:23|lpm_add_sub:646|
|jishuqi:23|lpm_add_sub:646|addcore:adder|
|jishuqi:23|lpm_add_sub:646|addcore:adder|addcore:adder1|
|jishuqi:23|lpm_add_sub:646|addcore:adder|addcore:adder0|
|jishuqi:23|lpm_add_sub:646|altshift:result_ext_latency_ffs|
|jishuqi:23|lpm_add_sub:646|altshift:carry_ext_latency_ffs|
|jishuqi:23|lpm_add_sub:646|altshift:oflow_ext_latency_ffs|
|jishuqi:23|lpm_add_sub:862|
|jishuqi:23|lpm_add_sub:862|addcore:adder|
|jishuqi:23|lpm_add_sub:862|addcore:adder|addcore:adder1|
|jishuqi:23|lpm_add_sub:862|addcore:adder|addcore:adder0|
|jishuqi:23|lpm_add_sub:862|altshift:result_ext_latency_ffs|
|jishuqi:23|lpm_add_sub:862|altshift:carry_ext_latency_ffs|
|jishuqi:23|lpm_add_sub:862|altshift:oflow_ext_latency_ffs|
|shift:25|
|shift:25|lpm_add_sub:84|
|shift:25|lpm_add_sub:84|addcore:adder|
|shift:25|lpm_add_sub:84|addcore:adder|addcore:adder0|
|shift:25|lpm_add_sub:84|altshift:result_ext_latency_ffs|
|shift:25|lpm_add_sub:84|altshift:carry_ext_latency_ffs|
|shift:25|lpm_add_sub:84|altshift:oflow_ext_latency_ffs|
|shift:25|lpm_add_sub:129|
|shift:25|lpm_add_sub:129|addcore:adder|
|shift:25|lpm_add_sub:129|addcore:adder|addcore:adder1|
|shift:25|lpm_add_sub:129|addcore:adder|addcore:adder0|
|shift:25|lpm_add_sub:129|altshift:result_ext_latency_ffs|
|shift:25|lpm_add_sub:129|altshift:carry_ext_latency_ffs|
|shift:25|lpm_add_sub:129|altshift:oflow_ext_latency_ffs|
Device-Specific Information: e:\jia\zuhe.rpt
zuhe
***** Logic for device 'zuhe' compiled without errors.
Device: EPM7128SLC84-15
Device Options:
Turbo Bit = ON
Security Bit = OFF
Enable JTAG Support = ON
User Code = ffff
MultiVolt I/O = OFF
R R R R R R R R R R R
E E E E E E E E E E E
S S S S S S S V S S S S
E E E E E E E C E E V E E w
R R R R R R R C R R C R R a
V V V V G V V V I G G G c G V V C V V v
E E E E N E E E N N N N l N E E c I E E e
D D D D D D D D T D D D k D D D s O D D 0
-----------------------------------------------------------------_
/ 11 10 9 8 7 6 5 4 3 2 1 84 83 82 81 80 79 78 77 76 75 |
RESERVED | 12 74 | wave1
VCCIO | 13 73 | RESERVED
#TDI | 14 72 | GND
RESERVED | 15 71 | #TDO
RESERVED | 16 70 | wave2
RESERVED | 17 69 | wave3
RESERVED | 18 68 | wave4
GND | 19 67 | RESERVED
RESERVED | 20 66 | VCCIO
RESERVED | 21 65 | wave6
RESERVED | 22 EPM7128SLC84-15 64 | wave5
#TMS | 23 63 | RESERVED
RESERVED | 24 62 | #TCK
RESERVED | 25 61 | wave7
VCCIO | 26 60 | wr
RESERVED | 27 59 | GND
RESERVED | 28 58 | sel
RESERVED | 29 57 | RESERVED
RESERVED | 30 56 | RESERVED
RESERVED | 31 55 | RESERVED
GND | 32 54 | RESERVED
|_ 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 _|
------------------------------------------------------------------
R R R R R V R R R G V R R R G R R R R R V
E E E E E C E E E N C E E E N E E E E E C
S S S S S C S S S D C S S S D S S S S S C
E E E E E I E E E I E E E E E E E E I
R R R R R O R R R N R R R R R R R R O
V V V V V V V V T V V V V V V V V
E E E E E E E E E E E E E E E E
D D D D D D D D D D D D D D D D
N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.
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