dds_vhdl.rpt

基于FPGA的直接数字频率合成器（DDS）设计 （源程序）

fword0   : INPUT;
fword1   : INPUT;
fword2   : INPUT;
fword3   : INPUT;
fword4   : INPUT;
fword5   : INPUT;
fword6   : INPUT;
fword7   : INPUT;
pword0   : INPUT;
pword1   : INPUT;
pword2   : INPUT;
pword3   : INPUT;
pword4   : INPUT;
pword5   : INPUT;
pword6   : INPUT;
pword7   : INPUT;

-- Node name is 'fout0~fit~in1' 
-- Equation name is 'fout0~fit~in1', location is LC2_C18, type is buried.
-- synthesized logic cell 
_LC2_C18 = LCELL( _EC3_C);

-- Node name is 'fout0' 
-- Equation name is 'fout0', type is output 
fout0    =  _LC2_C18;

-- Node name is 'fout1~fit~in1' 
-- Equation name is 'fout1~fit~in1', location is LC1_C17, type is buried.
-- synthesized logic cell 
_LC1_C17 = LCELL( _EC2_C);

-- Node name is 'fout1' 
-- Equation name is 'fout1', type is output 
fout1    =  _LC1_C17;

-- Node name is 'fout2~fit~in1' 
-- Equation name is 'fout2~fit~in1', location is LC2_C19, type is buried.
-- synthesized logic cell 
_LC2_C19 = LCELL( _EC7_C);

-- Node name is 'fout2' 
-- Equation name is 'fout2', type is output 
fout2    =  _LC2_C19;

-- Node name is 'fout3~fit~in1' 
-- Equation name is 'fout3~fit~in1', location is LC2_C20, type is buried.
-- synthesized logic cell 
_LC2_C20 = LCELL( _EC6_C);

-- Node name is 'fout3' 
-- Equation name is 'fout3', type is output 
fout3    =  _LC2_C20;

-- Node name is 'fout4~fit~in1' 
-- Equation name is 'fout4~fit~in1', location is LC1_C21, type is buried.
-- synthesized logic cell 
_LC1_C21 = LCELL( _EC1_C);

-- Node name is 'fout4' 
-- Equation name is 'fout4', type is output 
fout4    =  _LC1_C21;

-- Node name is 'fout5~fit~in1' 
-- Equation name is 'fout5~fit~in1', location is LC7_C23, type is buried.
-- synthesized logic cell 
_LC7_C23 = LCELL( _EC4_C);

-- Node name is 'fout5' 
-- Equation name is 'fout5', type is output 
fout5    =  _LC7_C23;

-- Node name is 'fout6~fit~in1' 
-- Equation name is 'fout6~fit~in1', location is LC8_C14, type is buried.
-- synthesized logic cell 
_LC8_C14 = LCELL( _EC8_C);

-- Node name is 'fout6' 
-- Equation name is 'fout6', type is output 
fout6    =  _LC8_C14;

-- Node name is 'fout7~fit~in1' 
-- Equation name is 'fout7~fit~in1', location is LC4_C22, type is buried.
-- synthesized logic cell 
_LC4_C22 = LCELL( _EC5_C);

-- Node name is 'fout7' 
-- Equation name is 'fout7', type is output 
fout7    =  _LC4_C22;

-- Node name is 'pout0~fit~in1' 
-- Equation name is 'pout0~fit~in1', location is LC6_B14, type is buried.
-- synthesized logic cell 
_LC6_B14 = LCELL( _EC4_A);

-- Node name is 'pout0' 
-- Equation name is 'pout0', type is output 
pout0    =  _LC6_B14;

-- Node name is 'pout1~fit~in1' 
-- Equation name is 'pout1~fit~in1', location is LC5_B19, type is buried.
-- synthesized logic cell 
_LC5_B19 = LCELL( _EC6_A);

-- Node name is 'pout1' 
-- Equation name is 'pout1', type is output 
pout1    =  _LC5_B19;

-- Node name is 'pout2~fit~in1' 
-- Equation name is 'pout2~fit~in1', location is LC3_A16, type is buried.
-- synthesized logic cell 
_LC3_A16 = LCELL( _EC1_A);

-- Node name is 'pout2' 
-- Equation name is 'pout2', type is output 
pout2    =  _LC3_A16;

-- Node name is 'pout3~fit~in1' 
-- Equation name is 'pout3~fit~in1', location is LC1_B15, type is buried.
-- synthesized logic cell 
_LC1_B15 = LCELL( _EC8_A);

-- Node name is 'pout3' 
-- Equation name is 'pout3', type is output 
pout3    =  _LC1_B15;

-- Node name is 'pout4~fit~in1' 
-- Equation name is 'pout4~fit~in1', location is LC8_A14, type is buried.
-- synthesized logic cell 
_LC8_A14 = LCELL( _EC2_A);

-- Node name is 'pout4' 
-- Equation name is 'pout4', type is output 
pout4    =  _LC8_A14;

-- Node name is 'pout5~fit~in1' 
-- Equation name is 'pout5~fit~in1', location is LC8_A20, type is buried.
-- synthesized logic cell 
_LC8_A20 = LCELL( _EC7_A);

-- Node name is 'pout5' 
-- Equation name is 'pout5', type is output 
pout5    =  _LC8_A20;

-- Node name is 'pout6~fit~in1' 
-- Equation name is 'pout6~fit~in1', location is LC4_A15, type is buried.
-- synthesized logic cell 
_LC4_A15 = LCELL( _EC5_A);

-- Node name is 'pout6' 
-- Equation name is 'pout6', type is output 
pout6    =  _LC4_A15;

-- Node name is 'pout7~fit~in1' 
-- Equation name is 'pout7~fit~in1', location is LC3_A15, type is buried.
-- synthesized logic cell 
_LC3_A15 = LCELL( _EC3_A);

-- Node name is 'pout7' 
-- Equation name is 'pout7', type is output 
pout7    =  _LC3_A15;

-- Node name is '|adder8b:u4|LPM_ADD_SUB:25|addcore:adder|pcarry1' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC6_A4', type is buried 
_LC6_A4  = LCELL( _EQ001);
  _EQ001 =  _LC7_A4 &  pword1
         #  _LC3_A4 &  pword0 &  pword1
         #  _LC3_A4 &  _LC7_A4 &  pword0;

-- Node name is '|adder8b:u4|LPM_ADD_SUB:25|addcore:adder|pcarry2' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC1_A3', type is buried 
_LC1_A3  = LCELL( _EQ002);
  _EQ002 =  _LC6_A4 &  pword2
         #  _LC5_A4 &  _LC6_A4
         #  _LC5_A4 &  pword2;

-- Node name is '|adder8b:u4|LPM_ADD_SUB:25|addcore:adder|pcarry3' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC5_A3', type is buried 
_LC5_A3  = LCELL( _EQ003);
  _EQ003 =  _LC1_A3 &  pword3
         #  _LC1_A3 &  _LC2_A3
         #  _LC2_A3 &  pword3;

-- Node name is '|adder8b:u4|LPM_ADD_SUB:25|addcore:adder|pcarry4' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC6_A12', type is buried 
_LC6_A12 = LCELL( _EQ004);
  _EQ004 =  _LC5_A3 &  pword4
         #  _LC2_A6 &  _LC5_A3
         #  _LC2_A6 &  pword4;

-- Node name is '|adder8b:u4|LPM_ADD_SUB:25|addcore:adder|pcarry5' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC7_A12', type is buried 
_LC7_A12 = LCELL( _EQ005);
  _EQ005 =  _LC6_A12 &  pword5
         #  _LC3_A6 &  _LC6_A12
         #  _LC3_A6 &  pword5;

-- Node name is '|adder8b:u4|LPM_ADD_SUB:25|addcore:adder|~162~1' from file "addcore.tdf" line 316, column 67
-- Equation name is '_LC5_A12', type is buried 
-- synthesized logic cell 
_LC5_A12 = LCELL( _EQ006);
  _EQ006 = !_LC1_A6 &  pword7
         #  _LC1_A6 & !pword7;

-- Node name is '|adder16b:u1|LPM_ADD_SUB:49|addcore:adder|pcarry9' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC1_A4', type is buried 
_LC1_A4  = LCELL( _EQ007);
  _EQ007 =  fword1 &  _LC7_A4
         #  fword0 &  _LC3_A4 &  _LC7_A4
         #  fword0 &  fword1 &  _LC3_A4;

-- Node name is '|adder16b:u1|LPM_ADD_SUB:49|addcore:adder|pcarry10' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC4_A4', type is buried 
_LC4_A4  = LCELL( _EQ008);
  _EQ008 =  _LC1_A4 &  _LC5_A4
         #  fword2 &  _LC1_A4
         #  fword2 &  _LC5_A4;

-- Node name is '|adder16b:u1|LPM_ADD_SUB:49|addcore:adder|pcarry11' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC8_A3', type is buried 
_LC8_A3  = LCELL( _EQ009);
  _EQ009 =  _LC2_A3 &  _LC4_A4
         #  fword3 &  _LC4_A4
         #  fword3 &  _LC2_A3;

-- Node name is '|adder16b:u1|LPM_ADD_SUB:49|addcore:adder|pcarry12' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC5_A6', type is buried 
_LC5_A6  = LCELL( _EQ010);
  _EQ010 =  _LC2_A6 &  _LC8_A3
         #  fword4 &  _LC8_A3
         #  fword4 &  _LC2_A6;

-- Node name is '|adder16b:u1|LPM_ADD_SUB:49|addcore:adder|pcarry13' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC6_A6', type is buried 
_LC6_A6  = LCELL( _EQ011);
  _EQ011 =  _LC3_A6 &  _LC5_A6
         #  fword5 &  _LC5_A6
         #  fword5 &  _LC3_A6;

-- Node name is '|adder16b:u1|LPM_ADD_SUB:49|addcore:adder|pcarry14' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC7_A6', type is buried 
_LC7_A6  = LCELL( _EQ012);
  _EQ012 =  _LC4_A6 &  _LC6_A6
         #  fword6 &  _LC6_A6
         #  fword6 &  _LC4_A6;

-- Node name is '|reg8b:u5|:10' 
-- Equation name is '_LC3_A12', type is buried 
_LC3_A12 = DFFE( _EQ013,  clk,  VCC,  VCC,  VCC);
  _EQ013 = !_LC5_A12 &  _LC7_A12 &  pword6
         #  _LC4_A6 & !_LC5_A12 &  _LC7_A12
         #  _LC4_A6 & !_LC5_A12 &  pword6
         # !_LC4_A6 &  _LC5_A12 & !pword6
         #  _LC5_A12 & !_LC7_A12 & !pword6
         # !_LC4_A6 &  _LC5_A12 & !_LC7_A12;

-- Node name is '|reg8b:u5|:12' 
-- Equation name is '_LC1_A12', type is buried 
_LC1_A12 = DFFE( _EQ014,  clk,  VCC,  VCC,  VCC);
  _EQ014 = !_LC4_A6 & !_LC7_A12 &  pword6
         #  _LC4_A6 & !_LC7_A12 & !pword6
         #  _LC4_A6 &  _LC7_A12 &  pword6
         # !_LC4_A6 &  _LC7_A12 & !pword6;

-- Node name is '|reg8b:u5|:14' 
-- Equation name is '_LC2_A12', type is buried 
_LC2_A12 = DFFE( _EQ015,  clk,  VCC,  VCC,  VCC);
  _EQ015 = !_LC3_A6 & !_LC6_A12 &  pword5