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📄 sin_rom.fit

📁 基于FPGA的直接数字频率合成器(DDS)设计 (源程序)
💻 FIT
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-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 09/24/2008 15:38:27      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "sin_rom"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "address0"                     : INPUT_PIN  = 17     ;
    "address1"                     : INPUT_PIN  = 73     ;
    "address2"                     : INPUT_PIN  = 69     ;
    "address3"                     : INPUT_PIN  = 43     ;
    "address4"                     : INPUT_PIN  = 84     ;
    "address5"                     : INPUT_PIN  = 44     ;
    "address6"                     : INPUT_PIN  = 42     ;
    "address7"                     : INPUT_PIN  = 2      ;
    "inclock"                      : INPUT_PIN  = 1      ;
    "q0"                           : OUTPUT_PIN = 19     ;
    "q1"                           : OUTPUT_PIN = 30     ;
    "q2"                           : OUTPUT_PIN = 18     ;
    "q3"                           : OUTPUT_PIN = 22     ;
    "q4"                           : OUTPUT_PIN = 70     ;
    "q5"                           : OUTPUT_PIN = 72     ;
    "q6"                           : OUTPUT_PIN = 71     ;
    "q7"                           : OUTPUT_PIN = 60     ;
    "|lpm_rom:lpm_rom_component|altrom:srom|segment0_0" : LOCATION   = EC4_A  ;
    "|lpm_rom:lpm_rom_component|altrom:srom|segment0_1" : LOCATION   = EC8_A  ;
    "|lpm_rom:lpm_rom_component|altrom:srom|segment0_2" : LOCATION   = EC1_A  ;
    "|lpm_rom:lpm_rom_component|altrom:srom|segment0_3" : LOCATION   = EC2_A  ;
    "|lpm_rom:lpm_rom_component|altrom:srom|segment0_4" : LOCATION   = EC6_A  ;
    "|lpm_rom:lpm_rom_component|altrom:srom|segment0_5" : LOCATION   = EC3_A  ;
    "|lpm_rom:lpm_rom_component|altrom:srom|segment0_6" : LOCATION   = EC5_A  ;
    "|lpm_rom:lpm_rom_component|altrom:srom|segment0_7" : LOCATION   = EC7_A  ;

END;

INTERNAL_INFO "sin_rom"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OH10R0P17 : LORAX = "1:G41R0,RP18R0->EC4_A,->EC8_A,->EC1_A,->EC2_A,->EC6_A,->EC3_A,->EC5_A,->EC7_A|";
    OH0R0P73 : LORAX = "1:G10R0,RP11R0->EC4_A,->EC8_A,->EC1_A,->EC2_A,->EC6_A,->EC3_A,->EC5_A,->EC7_A|";
    OH7R0P69 : LORAX = "1:G5R0,RP16R0->EC4_A,->EC8_A,->EC1_A,->EC2_A,->EC6_A,->EC3_A,->EC5_A,->EC7_A|";
    OD5P43  : LORAX = "1:FB5|2:CH1R0,RP7R0->EC4_A,->EC8_A,->EC1_A,->EC2_A,->EC6_A,->EC3_A,->EC5_A,->EC7_A||";
    OD0P84  : LORAX = "1:FB0|2:FH0R0,RP0R0->EC4_A,->EC8_A,->EC1_A,->EC2_A,->EC6_A,->EC3_A,->EC5_A,->EC7_A||";
    OD2P44  : LORAX = "1:FB2|2:FH2R0,RP6R0->EC4_A,->EC8_A,->EC1_A,->EC2_A,->EC6_A,->EC3_A,->EC5_A,->EC7_A||";
    OD3P42  : LORAX = "1:FB3|2:FH3R0,RP5R0->EC4_A,->EC8_A,->EC1_A,->EC2_A,->EC6_A,->EC3_A,->EC5_A,->EC7_A||";
    OD1P2   : LORAX = "1:FB1|2:FH1R0,RP20R0->EC4_A,->EC8_A,->EC1_A,->EC2_A,->EC6_A,->EC3_A,->EC5_A,->EC7_A||";
    OD4P1   : LORAX = "1:FB4->EC4_A,->EC8_A,->EC1_A,->EC2_A,->EC6_A,->EC3_A,->EC5_A,->EC7_A|";
    EC4_A   : LORAX = "1:RB3R0,G84R0->OH14R0P19|";
    EC8_A   : LORAX = "1:RB7R0,RV22,G92R2->OH14R2P30|";
    EC1_A   : LORAX = "1:RB0R0,G60R0->OH12R0P18|";
    EC2_A   : LORAX = "1:RB1R0,RV12,G22R1->OH9R1P22|";
    EC6_A   : LORAX = "1:RB5R0,G85R0->OH4R0P70|";
    EC3_A   : LORAX = "1:RB2R0,G3R0->OH2R0P72|";
    EC5_A   : LORAX = "1:RB4R0,G34R0,V9C9,G33R0->OH3R0P71|";
    EC7_A   : LORAX = "1:RB6R0,G35R0,V9C15,HHR17R2->OH3R2P60|";
END;

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