fpga_uartrw.qsf

FPGA的uart控制器的verilog源程序

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
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# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		fpga_uartrw_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name DEVICE EP2C8Q208C8
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name TOP_LEVEL_ENTITY fpga_uartrw
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:38:38  MAY 06, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION 7.1
set_global_assignment -name VERILOG_FILE fpga_receiver.v
set_global_assignment -name VERILOG_FILE fpga_transmitter.v
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name BDF_FILE fpga_uartrw.bdf
set_global_assignment -name TCL_SCRIPT_FILE fpga_uartrw.tcl
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name ENABLE_INIT_DONE_OUTPUT OFF
set_location_assignment PIN_23 -to clk
set_location_assignment PIN_106 -to uart_rxd
set_location_assignment PIN_107 -to uart_txd
set_location_assignment PIN_5 -to txd_busy_led
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_global_assignment -name ENABLE_SIGNALTAP ON
set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
set_location_assignment PIN_4 -to rxd_ready_led