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📄 cpu01mon.lst

📁 一个简单的cpu的VHDL源码描述
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Macro Cross Assembler RMCA6800 (3.11) - Mon Dec 22 07:46:02 2003                                                         Page 0001
 
 

00001                          **===========================================================================**
00002                          **
00003                          **  D E B U G G E R    CPU01 Debug Monitor
00004                          **
00005                          **  www.OpenCores.Org - August 2003
00006                          **  This software adheres to the GNU public license  
00007                          **
00008                          ** File name      : cpu01mon.sa
00009                          **
00010                          ** Purpose        : Implements a built-in Debug monitor
00011                          **                  for the System6801 compatible CPU core
00012                          **
00013                          ** Author         : Michael L. Hasenfratz Sr.
00014                          **
00015                          **===========================================================================**
00016                          **
00017                          ** Revision History:
00018                          **
00019                          ** Date:  Revision Author
00020                          **===========================================================================**
00021                          ** 12 Oct 2003  0.1  Michael L. Hasenfratz Sr.
00022                          **
00023                                           NAM        CPU01MON         
00024                                           TTL        Sunday, October 12, 2003 (mlh) DEBUG MONITOR FOR System6801 

00026                          *
00027                          *    This is a debug monitor for use with
00028                          *    the OpenCore System6801 CPU 
00029                          *    Or MOTOROLA MC6800 MICROPROCESSORS
00030                          *

00032                          *
00033                          *    PROGRAM START ADDRESS
00034                          *
00035   F800                   ROMSTR           EQU        $F800            . ROM START ADDRESS
00036   0080                   RAMSTR           EQU        $0080            . RAM START ADDRESS
00037   0100                   RAMEND           EQU        $0100            . RAM END ADDRESS
00038   0000                   IO$STR           EQU        $0000            . INTERNAL REGISTERS

00040                          *
00041                          *      wb_acia (ACIA) SERIAL PORT ADDRESS DEFINITION
00042                          *
00043   0010                   ACIA$S           EQU        IO$STR+$10       . Start of the ACIA
00044   0010                   ACCTRL           EQU        ACIA$S+0         . ACIA CONTROL
00045   0010                   ACSTAT           EQU        ACIA$S+0         . ACIA STATUS
00046   0011                   RXDATA           EQU        ACIA$S+1         . RECEIVE DATA PORT
00047   0011                   TXDATA           EQU        ACIA$S+1         . TRANSMIT DATA PORT
00048   0001                   RDRF             EQU        %00000001        . RCV DATA REG FULL
00049   0002                   TDRE             EQU        %00000010        . TX DATA REG EMPTY

00051                          *
00052                          *    SOME ASCII CHARACTER DEFINITIONS
00053                          *
00054   000D                   CR               EQU        $0D              . <CR>
00055   000A                   LF               EQU        $0A              . <LF>
00056   0020                   SPACE            EQU        $20              . <SPACE>
00057   0007                   BELL             EQU        $07              . <BELL/BEEP>

Macro Cross Assembler RMCA6800 (3.11) - Mon Dec 22 07:46:02 2003                                                         Page 0002
 Sunday, October 12, 2003 (mlh) DEBUG MONITOR FOR System6801
 

00059                          *
00060                          *     RAM LOCATIONS REQUIRED 
00061                          *
00062                                           ORG        RAMSTR           
00063   0080                   VARSTR           EQU        *                
00064   0080                   USTACK           RMB        2                . USER'S STACK POINTER

00066                          *
00067                          *      VECTOR BUFFER
00068                          *
00069   0082                   VECBUF           EQU        *                
00070   0082                   IRQSCI           RMB        2                . 'SCI' VECTOR
00071   0084                   IRQTOF           RMB        2                . 'TOF' VECTOR
00072   0086                   IRQOCF           RMB        2                . 'OCF' VECTOR
00073   0088                   IRQICF           RMB        2                . 'ICF' VECTOR
00074   008A                   IRQ$VC           RMB        2                . IRQ VECTOR
00075   008C                   SWI$VC           RMB        2                . SWI #1 VECTOR
00076   008E                   NMI$VC           RMB        2                . NMI VECTOR

00078                          *
00079                          *      MISC. REGISTERS
00080                          *
00081   0090                   ADDRES           RMB        2                . ADDRESS TEMPORARY STORAGE
00082   0092                   AECHO            RMB        1                . ECHO FLAG
00083   0093                   BYTECT           RMB        1                . BYTE COUNT (LOADER)
00084   0094                   CHKSUM           RMB        1                . CHECK-SUM (LOADER)
00085   0095                   IRQFLG           RMB        1                . IRQ FLAG 0=STOP IRQ
00086   0096                   VFLAG            RMB        1                . VALUE FLAG 0=NO ENTRY
00087   0097                   VALUE            RMB        2                . BINARY VALUE ENTERED
00088   0099                   BRKPTS           RMB        4*4              . 4 BREAK-POINTS MAY BE SET
00089   00A9                   OFFSET           RMB        2                . OFFSET TO BE ADDED TO ADDRESSES
00090   00AB                   DB$STK           RMB        2                . DEBUG STACK
00091   00AD                   BEGADR           RMB        2                . BEGIN ADDRESS
00092   00AF                   ENDADR           RMB        2                . END ADDRESS
00093   00B1                   TMP$00           RMB        2                . SOME TEMPORARY STORAGE
00094   00B3                   TMP$01           RMB        2                
00095   00B5                   TMP$02           RMB        2                
00096   00B7                   TMP$03           RMB        2                
00097   00B9                   VAREND           EQU        *                

00099   00DB                   U$STK            EQU        (VAREND+((RAMEND-VAREND)/2))-1 . USER'S STACK
00100   00FF                   STACK            EQU        RAMEND-1         

00102                          *
00103                          *    ROM START (JUMP TABLE)
00104                          *
00105                                           ORG        ROMSTR           
00106   F800 7E F9 E3                           JMP        INCH             . INPUT 1 CHAR FROM CONSOLE (W/PARITY)
00107   F803 7E F9 DE                           JMP        INCHNP           . INPUT 1 CHAR FROM CONSOLE (WO/PARITY)
00108   F806 7E F9 F0                           JMP        OUTCH            . OUTPUT 1 CHAR TO CONSOLE
00109   F809 7E F9 FB                           JMP        PDATA            . PRINT <CR>,<LF>,<NULLS> & STRING (TO EOT)
00110   F80C 7E F9 FD                           JMP        PDATA1           . PRINT STRING (TO EOT)
00111   F80F 7E FA 09                           JMP        PCRLF            . PRINT <CR>,<LF>,<NULLS>
00112   F812 7E FB E7                           JMP        GO$SB2           . RE-ENTER MONITOR (WO/INITIALIZATION)
00113   F815 7E FC D2                           JMP        BEGEND           . GET BEGIN/END ADDRESSES
00114   F818 7E FA 6F                           JMP        OUT2HS           . PRINT 2 HEX CHARS & <SP>
00115   F81B 7E FA 6D                           JMP        OUT4HS           . PRINT 4 HEX CHARS & <SP>

Macro Cross Assembler RMCA6800 (3.11) - Mon Dec 22 07:46:02 2003                                                         Page 0003
 Sunday, October 12, 2003 (mlh) DEBUG MONITOR FOR System6801
 

00117                          *
00118                          *   (wb_acia) ACIA INITIALIZATION VALUE
00119                          *
00120   F81E 15                ACINIT           FCB        %00010101        . NO RCV IRQ, NO XMIT IRQ, 8 BIT, NO PARITY, 1 STOP, 96

00122                          *
00123                          *    S T R I N G S   A N D   T H I N G S
00124                          *
00125   F81F 43 50 55 30 31    HEADER           FCC        /CPU01MON Ver. 2.2/ 
00126   F830 04                                 FCB        4                
00127   F831 00 00 00 00 3E    PRMT             FCB        0,0,0,0,'>,4     
00128   F837 20 2D 20 49 4E    INVAL            FCC        / - INV/         
00129   F83D 04                                 FCB        4                
00130   F83E 42 45 47 20 41    BEGMSG           FCC        /BEG ADDR - /    
00131   F849 04                                 FCB        4                
00132   F84A 45 4E 44 20 41    ENDMSG           FCC        /END ADDR - /    
00133   F855 04                                 FCB        4                
00134   F856 13                MEMERR           FCB        $13              . READER OFF
00135   F857 20 2D 20 4E 4F                     FCC        / - NO CHANGE/   
00136   F863 07 04             WHAT             FCB        BELL,4           
00137   F865 4E 4F 20 43 4F    CMPMSG           FCC        /NO COMPARE @/   
00138   F871 07 04                              FCB        BELL,4           
00139   F873 13                CHKERR           FCB        $13              . READER OFF
00140   F874 20 2D 20 43 48                     FCC        / - CHK SUM ERR/ 
00141   F882 07 04                              FCB        BELL,4           
00142   F884 13                LOADER           FCB        $13              . READER OFF
00143   F885 20 2D 20 4C 4F                     FCC        / - LOAD ERR/    
00144   F890 07 04                              FCB        BELL,4           
00145   F892 20 20 20 42 52    BRKSTG           FCC        /   BREAK - POINTS/ 
00146   F8A3 0D 0A 00 00 00    CRLF             FCB        CR,LF,0,0,0,0,4  
00147   F8AA 52 45 54 55 52    RTSSTR           FCC        /RETURN/         
00148   F8B0 04                                 FCB        4                
00149   F8B1 52 45 47          REGSTR           FCC        /REG/            
00150   F8B4 04                                 FCB        4                
00151   F8B5 49 52 51          IRQSTR           FCC        /IRQ/            
00152   F8B8 04                                 FCB        4                
00153   F8B9 53 57 49          SWISTR           FCC        /SWI/            
00154   F8BC 04                                 FCB        4                
00155   F8BD 4E 4D 49          NMISTR           FCC        /NMI/            
00156   F8C0 04                                 FCB        4                
00157   F8C1 42 52 4B 20 50    BRKSTR           FCC        /BRK PNT/        
00158   F8C8 04                                 FCB        4                
00159   F8C9 20 2D 20 43 43    DSPSTR           FCC        / - CC=/         . REGISTER DUMP STRING
00160   F8CF 04                                 FCB        4                
00161   F8D0 42 3D                              FCC        /B=/             
00162   F8D2 04                                 FCB        4                
00163   F8D3 41 3D                              FCC        /A=/             
00164   F8D5 04                                 FCB        4                
00165   F8D6 58 3D                              FCC        /X=/             
00166   F8D8 04                                 FCB        4                
00167   F8D9 50 43 3D                           FCC        /PC=/            
00168   F8DC 04                                 FCB        4                
00169   F8DD 53 3D                              FCC        /S=/             
00170   F8DF 04                                 FCB        4                

00172                          *
00173                          *    R E S T A R T   E N T R Y   P O I N T
00174                          *
Macro Cross Assembler RMCA6800 (3.11) - Mon Dec 22 07:46:02 2003                                                         Page 0004
 Sunday, October 12, 2003 (mlh) DEBUG MONITOR FOR System6801
 

00175   F8E0 8E 00 FF          COLD$            LDS        #STACK           . SET THE STACK

00177                          *
00178                          *       SET UP USERS STACK
00179                          *

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