dds_top.map.eqn

实现数字频率合成。能产生任意频率的正弦信号、方波信号、梯形波等

--Port A Logical Depth: 4096, Port A Logical Width: 10
--Port A Input: Registered, Port A Output: Registered
GB1_q_a[6]_PORT_A_address = BUS(AB1_16, AB1_15, AB1_14, AB1_13, Z5L4, Z5L5, Z5_44, Z5_45, Z6_42, Z6_43, Z6_44, Z6_45);
GB1_q_a[6]_PORT_A_address_reg = DFFE(GB1_q_a[6]_PORT_A_address, GB1_q_a[6]_clock_0, , , );
GB1_q_a[6]_clock_0 = DB01_87;
GB1_q_a[6]_PORT_A_data_out = MEMORY(, , GB1_q_a[6]_PORT_A_address_reg, , , , , , GB1_q_a[6]_clock_0, , , , , );
GB1_q_a[6]_PORT_A_data_out_reg = DFFE(GB1_q_a[6]_PORT_A_data_out, GB1_q_a[6]_clock_0, , , );
GB1_q_a[6] = GB1_q_a[6]_PORT_A_data_out_reg[0];


--GB1_q_a[5] is Sine_rom:inst7|altsyncram:altsyncram_component|altsyncram_0sp:auto_generated|q_a[5]
--RAM Block Operation Mode: ROM
--Port A Depth: 4096, Port A Width: 1
--Port A Logical Depth: 4096, Port A Logical Width: 10
--Port A Input: Registered, Port A Output: Registered
GB1_q_a[5]_PORT_A_address = BUS(AB1_16, AB1_15, AB1_14, AB1_13, Z5L4, Z5L5, Z5_44, Z5_45, Z6_42, Z6_43, Z6_44, Z6_45);
GB1_q_a[5]_PORT_A_address_reg = DFFE(GB1_q_a[5]_PORT_A_address, GB1_q_a[5]_clock_0, , , );
GB1_q_a[5]_clock_0 = DB01_87;
GB1_q_a[5]_PORT_A_data_out = MEMORY(, , GB1_q_a[5]_PORT_A_address_reg, , , , , , GB1_q_a[5]_clock_0, , , , , );
GB1_q_a[5]_PORT_A_data_out_reg = DFFE(GB1_q_a[5]_PORT_A_data_out, GB1_q_a[5]_clock_0, , , );
GB1_q_a[5] = GB1_q_a[5]_PORT_A_data_out_reg[0];


--GB1_q_a[4] is Sine_rom:inst7|altsyncram:altsyncram_component|altsyncram_0sp:auto_generated|q_a[4]
--RAM Block Operation Mode: ROM
--Port A Depth: 4096, Port A Width: 1
--Port A Logical Depth: 4096, Port A Logical Width: 10
--Port A Input: Registered, Port A Output: Registered
GB1_q_a[4]_PORT_A_address = BUS(AB1_16, AB1_15, AB1_14, AB1_13, Z5L4, Z5L5, Z5_44, Z5_45, Z6_42, Z6_43, Z6_44, Z6_45);
GB1_q_a[4]_PORT_A_address_reg = DFFE(GB1_q_a[4]_PORT_A_address, GB1_q_a[4]_clock_0, , , );
GB1_q_a[4]_clock_0 = DB01_87;
GB1_q_a[4]_PORT_A_data_out = MEMORY(, , GB1_q_a[4]_PORT_A_address_reg, , , , , , GB1_q_a[4]_clock_0, , , , , );
GB1_q_a[4]_PORT_A_data_out_reg = DFFE(GB1_q_a[4]_PORT_A_data_out, GB1_q_a[4]_clock_0, , , );
GB1_q_a[4] = GB1_q_a[4]_PORT_A_data_out_reg[0];


--GB1_q_a[3] is Sine_rom:inst7|altsyncram:altsyncram_component|altsyncram_0sp:auto_generated|q_a[3]
--RAM Block Operation Mode: ROM
--Port A Depth: 4096, Port A Width: 1
--Port A Logical Depth: 4096, Port A Logical Width: 10
--Port A Input: Registered, Port A Output: Registered
GB1_q_a[3]_PORT_A_address = BUS(AB1_16, AB1_15, AB1_14, AB1_13, Z5L4, Z5L5, Z5_44, Z5_45, Z6_42, Z6_43, Z6_44, Z6_45);
GB1_q_a[3]_PORT_A_address_reg = DFFE(GB1_q_a[3]_PORT_A_address, GB1_q_a[3]_clock_0, , , );
GB1_q_a[3]_clock_0 = DB01_87;
GB1_q_a[3]_PORT_A_data_out = MEMORY(, , GB1_q_a[3]_PORT_A_address_reg, , , , , , GB1_q_a[3]_clock_0, , , , , );
GB1_q_a[3]_PORT_A_data_out_reg = DFFE(GB1_q_a[3]_PORT_A_data_out, GB1_q_a[3]_clock_0, , , );
GB1_q_a[3] = GB1_q_a[3]_PORT_A_data_out_reg[0];


--GB1_q_a[2] is Sine_rom:inst7|altsyncram:altsyncram_component|altsyncram_0sp:auto_generated|q_a[2]
--RAM Block Operation Mode: ROM
--Port A Depth: 4096, Port A Width: 1
--Port A Logical Depth: 4096, Port A Logical Width: 10
--Port A Input: Registered, Port A Output: Registered
GB1_q_a[2]_PORT_A_address = BUS(AB1_16, AB1_15, AB1_14, AB1_13, Z5L4, Z5L5, Z5_44, Z5_45, Z6_42, Z6_43, Z6_44, Z6_45);
GB1_q_a[2]_PORT_A_address_reg = DFFE(GB1_q_a[2]_PORT_A_address, GB1_q_a[2]_clock_0, , , );
GB1_q_a[2]_clock_0 = DB01_87;
GB1_q_a[2]_PORT_A_data_out = MEMORY(, , GB1_q_a[2]_PORT_A_address_reg, , , , , , GB1_q_a[2]_clock_0, , , , , );
GB1_q_a[2]_PORT_A_data_out_reg = DFFE(GB1_q_a[2]_PORT_A_data_out, GB1_q_a[2]_clock_0, , , );
GB1_q_a[2] = GB1_q_a[2]_PORT_A_data_out_reg[0];


--GB1_q_a[1] is Sine_rom:inst7|altsyncram:altsyncram_component|altsyncram_0sp:auto_generated|q_a[1]
--RAM Block Operation Mode: ROM
--Port A Depth: 4096, Port A Width: 1
--Port A Logical Depth: 4096, Port A Logical Width: 10
--Port A Input: Registered, Port A Output: Registered
GB1_q_a[1]_PORT_A_address = BUS(AB1_16, AB1_15, AB1_14, AB1_13, Z5L4, Z5L5, Z5_44, Z5_45, Z6_42, Z6_43, Z6_44, Z6_45);
GB1_q_a[1]_PORT_A_address_reg = DFFE(GB1_q_a[1]_PORT_A_address, GB1_q_a[1]_clock_0, , , );
GB1_q_a[1]_clock_0 = DB01_87;
GB1_q_a[1]_PORT_A_data_out = MEMORY(, , GB1_q_a[1]_PORT_A_address_reg, , , , , , GB1_q_a[1]_clock_0, , , , , );
GB1_q_a[1]_PORT_A_data_out_reg = DFFE(GB1_q_a[1]_PORT_A_data_out, GB1_q_a[1]_clock_0, , , );
GB1_q_a[1] = GB1_q_a[1]_PORT_A_data_out_reg[0];


--GB1_q_a[0] is Sine_rom:inst7|altsyncram:altsyncram_component|altsyncram_0sp:auto_generated|q_a[0]
--RAM Block Operation Mode: ROM
--Port A Depth: 4096, Port A Width: 1
--Port A Logical Depth: 4096, Port A Logical Width: 10
--Port A Input: Registered, Port A Output: Registered
GB1_q_a[0]_PORT_A_address = BUS(AB1_16, AB1_15, AB1_14, AB1_13, Z5L4, Z5L5, Z5_44, Z5_45, Z6_42, Z6_43, Z6_44, Z6_45);
GB1_q_a[0]_PORT_A_address_reg = DFFE(GB1_q_a[0]_PORT_A_address, GB1_q_a[0]_clock_0, , , );
GB1_q_a[0]_clock_0 = DB01_87;
GB1_q_a[0]_PORT_A_data_out = MEMORY(, , GB1_q_a[0]_PORT_A_address_reg, , , , , , GB1_q_a[0]_clock_0, , , , , );
GB1_q_a[0]_PORT_A_data_out_reg = DFFE(GB1_q_a[0]_PORT_A_data_out, GB1_q_a[0]_clock_0, , , );
GB1_q_a[0] = GB1_q_a[0]_PORT_A_data_out_reg[0];


--DB9_9 is 48:inst4|74161:inst|f74161:sub|9
--operation mode is normal

DB9_9_lut_out = !DB9_9;
DB9_9 = DFFEAS(DB9_9_lut_out, 48mhz, VCC, , , , , , );


--DB9_110 is 48:inst4|74161:inst|f74161:sub|110
--operation mode is arithmetic

DB9_110_carry_eqn = DB9_95;
DB9_110_lut_out = DB9_110 $ (!DB9_110_carry_eqn);
DB9_110 = DFFEAS(DB9_110_lut_out, 48mhz, VCC, , , , , !E1_inst2, );

--DB9_105 is 48:inst4|74161:inst|f74161:sub|105
--operation mode is arithmetic

DB9_105 = CARRY(DB9_110 & (!DB9_95));


--E1L2 is 48:inst4|inst2~29
--operation mode is normal

E1L2 = DB01_87 & DB9_110;


--DB9_99 is 48:inst4|74161:inst|f74161:sub|99
--operation mode is arithmetic

DB9_99_carry_eqn = DB9_85;
DB9_99_lut_out = DB9_99 $ (DB9_99_carry_eqn);
DB9_99 = DFFEAS(DB9_99_lut_out, 48mhz, VCC, , , , , !E1_inst2, );

--DB9_95 is 48:inst4|74161:inst|f74161:sub|95
--operation mode is arithmetic

DB9_95 = CARRY(!DB9_85 # !DB9_99);


--DB9_87 is 48:inst4|74161:inst|f74161:sub|87
--operation mode is arithmetic

DB9_87_lut_out = DB9_9 $ DB9_87;
DB9_87 = DFFEAS(DB9_87_lut_out, 48mhz, VCC, , , , , !E1_inst2, );

--DB9_85 is 48:inst4|74161:inst|f74161:sub|85
--operation mode is arithmetic

DB9_85 = CARRY(DB9_9 & DB9_87);


--E1_inst2 is 48:inst4|inst2
--operation mode is normal

E1_inst2 = !DB9_87 # !DB9_99 # !E1L2 # !DB9_9;


--DB8_87 is 1hz1khz:inst3|fenpin:inst3|74161:inst2|f74161:sub|87
--operation mode is normal

DB8_87_carry_eqn = DB8_81;
DB8_87_lut_out = DB8_87_carry_eqn $ DB8_87;
DB8_87 = DFFEAS(DB8_87_lut_out, DB2_87, VCC, , , , , , );


--HB3_7 is cepin:inst9|74160:inst2|7
--operation mode is normal

HB3_7_lut_out = HB3_7 & (J1_inst10 $ (!HB3_9 & HB3L6)) # !HB3_7 & (!HB3_9 & HB3L6);
HB3_7 = DFFEAS(HB3_7_lut_out, GB1_q_a[9], cl, , , , , , );


--inst13 is inst13
--operation mode is normal

inst13_lut_out = !inst13;
inst13 = DFFEAS(inst13_lut_out, DB5_87, VCC, , , , , , );


--HB2_7 is cepin:inst9|74160:inst1|7
--operation mode is normal

HB2_7_lut_out = HB2_7 & (J1_inst10 $ (!HB2_9 & HB2L6)) # !HB2_7 & (!HB2_9 & HB2L6);
HB2_7 = DFFEAS(HB2_7_lut_out, GB1_q_a[9], cl, , , , , , );


--HB1_7 is cepin:inst9|74160:inst|7
--operation mode is normal

HB1_7_lut_out = HB1_7 & (J1_inst10 $ (!HB1_9 & HB1L6)) # !HB1_7 & (!HB1_9 & HB1L6);
HB1_7 = DFFEAS(HB1_7_lut_out, GB1_q_a[9], cl, , , , , , );


--HB4_7 is cepin:inst9|74160:inst3|7
--operation mode is normal

HB4_7_lut_out = HB4_7 & (J1_inst10 $ (!HB4_9 & HB4L6)) # !HB4_7 & (!HB4_9 & HB4L6);
HB4_7 = DFFEAS(HB4_7_lut_out, GB1_q_a[9], cl, , , , , , );


--DB31L5 is kuopx161:inst16|74161:inst|f74161:sub|82~0
--operation mode is arithmetic

DB31L5 = DB01_87 & key1;

--DB31_82 is kuopx161:inst16|74161:inst|f74161:sub|82
--operation mode is arithmetic

DB31_82 = CARRY(DB01_87 & key1);


--HB11L6 is kuopx:inst19|74160:inst4|47~55
--operation mode is normal

HB11L6 = HB01_6 & HB9_6 & HB9_9 & DB31L5;


--K2L2 is kuopx:inst19|inst5~30
--operation mode is normal

K2L2 = HB01_6 & HB9_6 & HB11_7 & HB01_8;


--K2_inst5 is kuopx:inst19|inst5
--operation mode is normal

K2_inst5 = HB9_8 & K2L2;


--HB11L01 is kuopx:inst19|74160:inst4|50~24
--operation mode is normal

HB11L01 = HB11_6 & HB01_9 & HB11L6 & !K2_inst5;


--HB11L7 is kuopx:inst19|74160:inst4|47~56
--operation mode is normal

HB11L7 = HB9_6 & HB9_9 & DB31L5;


--HB01L6 is kuopx:inst19|74160:inst1|50~24
--operation mode is normal

HB01L6 = HB01_6 & HB11L7 & (!K2L2 # !HB9_8);


--HB8L6 is kuopx:inst14|74160:inst4|47~55
--operation mode is normal

HB8L6 = HB7_6 & HB6_6 & HB6_9 & DB31L5;


--K1L2 is kuopx:inst14|inst5~30
--operation mode is normal

K1L2 = HB7_6 & HB6_6 & HB8_7 & HB7_8;


--K1_inst5 is kuopx:inst14|inst5
--operation mode is normal

K1_inst5 = HB6_8 & K1L2;


--HB8L01 is kuopx:inst14|74160:inst4|50~24
--operation mode is normal

HB8L01 = HB8_6 & HB7_9 & HB8L6 & !K1_inst5;


--HB8L7 is kuopx:inst14|74160:inst4|47~56
--operation mode is normal

HB8L7 = HB6_6 & HB6_9 & DB31L5;


--HB7L6 is kuopx:inst14|74160:inst1|50~24
--operation mode is normal

HB7L6 = HB7_6 & HB8L7 & (!K1L2 # !HB6_8);


--HB6L6 is kuopx:inst14|74160:inst|50~26
--operation mode is normal

HB6L6 = HB6_6 & DB31L5 & (!K1L2 # !HB6_8);


--HB9L6 is kuopx:inst19|74160:inst|50~26
--operation mode is normal

HB9L6 = HB9_6 & DB31L5 & (!K2L2 # !HB9_8);


--HB5_7 is cepin:inst9|74160:inst4|7
--operation mode is normal

HB5_7_lut_out = HB5_7 & (J1_inst10 $ (!HB5_9 & HB5L7)) # !HB5_7 & (!HB5_9 & HB5L7);
HB5_7 = DFFEAS(HB5_7_lut_out, GB1_q_a[9], cl, , , , , , );


--HB3_9 is cepin:inst9|74160:inst2|9
--operation mode is normal

HB3_9_lut_out = HB3L6 & HB3_7 & HB3_8 # !HB3L6 & (HB3L5);
HB3_9 = DFFEAS(HB3_9_lut_out, GB1_q_a[9], cl, , , , , , );


--HB2_9 is cepin:inst9|74160:inst1|9
--operation mode is normal

HB2_9_lut_out = HB2L6 & HB2_7 & HB2_8 # !HB2L6 & (HB2L5);
HB2_9 = DFFEAS(HB2_9_lut_out, GB1_q_a[9], cl, , , , , , );


--HB1_9 is cepin:inst9|74160:inst|9
--operation mode is normal

HB1_9_lut_out = HB1L6 & HB1_7 & HB1_8 # !HB1L6 & (HB1L5);
HB1_9 = DFFEAS(HB1_9_lut_out, GB1_q_a[9], cl, , , , , , );


--HB4_9 is cepin:inst9|74160:inst3|9
--operation mode is normal

HB4_9_lut_out = HB4L6 & HB4_7 & HB4_8 # !HB4L6 & (HB4L5);
HB4_9 = DFFEAS(HB4_9_lut_out, GB1_q_a[9], cl, , , , , , );


--HB11L8 is kuopx:inst19|74160:inst4|47~57
--operation mode is normal

HB11L8 = HB01_9 & (!K2L2 # !HB9_8);


--HB11L5 is kuopx:inst19|74160:inst4|25~23
--operation mode is normal

HB11L5 = HB11_6 & HB11_7 & HB11L6 & HB11L8;


--HB11L9 is kuopx:inst19|74160:inst4|49~50
--operation mode is normal

HB11L9 = HB11_9 & (!HB11L6 # !HB01_9 # !HB11_6);


--HB01L5 is kuopx:inst19|74160:inst1|25~25
--operation mode is normal

HB01L5 = HB01_6 & HB01_7 & HB11L7 & !K2_inst5;


--HB8L8 is kuopx:inst14|74160:inst4|47~57
--operation mode is normal

HB8L8 = HB7_9 & (!K1L2 # !HB6_8);


--HB8L5 is kuopx:inst14|74160:inst4|25~23
--operation mode is normal

HB8L5 = HB8_6 & HB8_7 & HB8L6 & HB8L8;


--HB8L9 is kuopx:inst14|74160:inst4|49~50
--operation mode is normal

HB8L9 = HB8_9 & (!HB8L6 # !HB7_9 # !HB8_6);


--HB7L5 is kuopx:inst14|74160:inst1|25~25
--operation mode is normal

HB7L5 = HB7_6 & HB7_7 & HB8L7 & !K1_inst5;


--HB6L5 is kuopx:inst14|74160:inst|13~137
--operation mode is normal

HB6L5 = HB6_9 & !K1_inst5 & (!DB31L5 # !HB6_6);


--HB9L5 is kuopx:inst19|74160:inst|13~137
--operation mode is normal

HB9L5 = HB9_9 & !K2_inst5 & (!DB31L5 # !HB9_6);


--HB5_9 is cepin:inst9|74160:inst4|9
--operation mode is normal

HB5_9_lut_out = HB5L5 # HB5_7 & HB5_8 & HB5L7;
HB5_9 = DFFEAS(HB5_9_lut_out, GB1_q_a[9], cl, , , , , , );


--HB3_8 is cepin:inst9|74160:inst2|8
--operation mode is normal

HB3_8_lut_out = HB3_7 & (HB3L6 $ (HB3_8 & J1_inst10)) # !HB3_7 & HB3_8 & J1_inst10;
HB3_8 = DFFEAS(HB3_8_lut_out, GB1_q_a[9], cl, , , , , , );


--HB2_8 is cepin:inst9|74160:inst1|8
--operation mode is normal

HB2_8_lut_out = HB2_7 & (HB2L6 $ (HB2_8 & J1_inst10)) # !HB2_7 & HB2_8 & J1_inst10;
HB2_8 = DFFEAS(HB2_8_lut_out, GB1_q_a[9], cl, , , , , , );


--HB1_8 is cepin:inst9|74160:inst|8
--operation mode is normal

HB1_8_lut_out = HB1_7 & (HB1L6 $ (HB1_8 & J1_inst10)) # !HB1_7 & HB1_8 & J1_inst10;
HB1_8 = DFFEAS(HB1_8_lut_out, GB1_q_a[9], cl, , , , , , );


--HB4_8 is cepin:inst9|74160:inst3|8
--operation mode is normal

HB4_8_lut_out = HB4_7 & (HB4L6 $ (HB4_8 & J1_inst10)) # !HB4_7 & HB4_8 & J1_inst10;
HB4_8 = DFFEAS(HB4_8_lut_out, GB1_q_a[9], cl, , , , , , );


--HB5_8 is cepin:inst9|74160:inst4|8
--operation mode is normal

HB5_8_lut_out = HB5_7 & (HB5L7 $ (HB5_8 & J1_inst10)) # !HB5_7 & HB5_8 & J1_inst10;
HB5_8 = DFFEAS(HB5_8_lut_out, GB1_q_a[9], cl, , , , , , );


--HB3_6 is cepin:inst9|74160:inst2|6
--operation mode is normal

HB3_6_lut_out = HB3_6 & (J1_inst10 $ (HB2_9 & HB2L6)) # !HB3_6 & HB2_9 & HB2L6;
HB3_6 = DFFEAS(HB3_6_lut_out, GB1_q_a[9], cl, , , , , , );


--HB2_6 is cepin:inst9|74160:inst1|6
--operation mode is normal

HB2_6_lut_out = HB2_6 & (J1_inst10 $ (HB1_9 & HB1L6)) # !HB2_6 & HB1_9 & HB1L6;
HB2_6 = DFFEAS(HB2_6_lut_out, GB1_q_a[9], cl, , , , , , );


--HB1_6 is cepin:inst9|74160:inst|6
--operation mode is normal

HB1_6_lut_out = inst13 & (!HB1_6) # !inst13 & DB5_87 & HB1_6;
HB1_6 = DFFEAS(HB1_6_lut_out, GB1_q_a[9], cl, , , , , , );


--HB4_6 is cepin:inst9|74160:inst3|6
--operation mode is normal

HB4_6_lut_out = HB4_6 & (J1_inst10 $ (HB3_9 & HB3L6)) # !HB4_6 & HB3_9 & HB3L6;
HB4_6 = DFFEAS(HB4_6_lut_out, GB1_q_a[9], cl, , , , , , );


--HB5_6 is cepin:inst9|74160:inst4|6
--operation mode is normal

HB5_6_lut_out = inst13 & (HB5_6 $ HB5L6) # !inst13 & DB5_87 & (HB5_6 $ HB5L6);
HB5_6 = DFFEAS(HB5_6_lut_out, GB1_q_a[9], cl, , , , , , );


--AB3_15 is jcq:inst1|74175:inst2|15
--operation mode is normal

AB3_15_lut_out = !AB3_15;
AB3_15 = DFFEAS(AB3_15_lut_out, DB01_87, cl, , Z3L3, , , , );


--HB31_7 is 3:inst36|74160:inst|7