tennis.tan.rpt

里面是个乒乓游戏机的试验程序 要的就下载吧 挺好的 用FPGA

+-------+------------------------------------------------+-----------------------------------------------------------------------+-----------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period)                           ; From                                                                  ; To                                                                    ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-------+------------------------------------------------+-----------------------------------------------------------------------+-----------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A   ; 64.94 MHz ( period = 15.400 ns )               ; ballctrl:ucpu|serve                                                   ; board:ubdb|couclk                                                     ; bbin       ; bbin     ; None                        ; None                      ; 3.000 ns                ;
; N/A   ; 86.21 MHz ( period = 11.600 ns )               ; ballctrl:ucpu|serve                                                   ; board:ubdb|serclk                                                     ; bbin       ; bbin     ; None                        ; None                      ; 1.100 ns                ;
; N/A   ; 96.15 MHz ( period = 10.400 ns )               ; board:ubdb|serclk                                                     ; ballctrl:ucpu|ballen                                                  ; bbin       ; bbin     ; None                        ; None                      ; 4.400 ns                ;
; N/A   ; 131.58 MHz ( period = 7.600 ns )               ; board:ubdb|serclk                                                     ; ballctrl:ucpu|serve                                                   ; bbin       ; bbin     ; None                        ; None                      ; 3.900 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[2]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[0]  ; bbin       ; bbin     ; None                        ; None                      ; 3.300 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[2]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[2]  ; bbin       ; bbin     ; None                        ; None                      ; 3.300 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[2]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[3]  ; bbin       ; bbin     ; None                        ; None                      ; 3.300 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[2]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[1]  ; bbin       ; bbin     ; None                        ; None                      ; 3.300 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[3] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[2] ; bbin       ; bbin     ; None                        ; None                      ; 3.300 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[3] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[1] ; bbin       ; bbin     ; None                        ; None                      ; 3.300 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[3] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[0] ; bbin       ; bbin     ; None                        ; None                      ; 3.300 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[3] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[3] ; bbin       ; bbin     ; None                        ; None                      ; 3.300 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[0]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[0]  ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[3]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[0]  ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[0]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[2]  ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[3]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[2]  ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[0]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[3]  ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[3]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[3]  ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[0]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[1]  ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[3]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[1]  ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[1] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[2] ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[0] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[2] ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[1] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[1] ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[0] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[1] ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[1] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[0] ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[0] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[0] ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[1] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[3] ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[0] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[3] ; bbin       ; bbin     ; None                        ; None                      ; 3.200 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[1]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[0]  ; bbin       ; bbin     ; None                        ; None                      ; 3.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[1]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[2]  ; bbin       ; bbin     ; None                        ; None                      ; 3.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[1]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[3]  ; bbin       ; bbin     ; None                        ; None                      ; 3.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[1]  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[1]  ; bbin       ; bbin     ; None                        ; None                      ; 3.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[2] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[2] ; bbin       ; bbin     ; None                        ; None                      ; 3.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[2] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[1] ; bbin       ; bbin     ; None                        ; None                      ; 3.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[2] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[0] ; bbin       ; bbin     ; None                        ; None                      ; 3.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[2] ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[3] ; bbin       ; bbin     ; None                        ; None                      ; 3.000 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[3] ; cou10:ubl|cout                                                        ; bbin       ; bbin     ; None                        ; None                      ; 1.400 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[1] ; cou10:ubl|cout                                                        ; bbin       ; bbin     ; None                        ; None                      ; 1.300 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[0] ; cou10:ubl|cout                                                        ; bbin       ; bbin     ; None                        ; None                      ; 1.300 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[2] ; cou10:ubl|cout                                                        ; bbin       ; bbin     ; None                        ; None                      ; 1.100 ns                ;
+-------+------------------------------------------------+-----------------------------------------------------------------------+-----------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Hold: 'bain'                                                                                                                                                                              ;
+------------------------------------------+-------------------+---------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Minimum Slack                            ; From              ; To                  ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
+------------------------------------------+-------------------+---------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Not operational: Clock Skew > Data Delay ; board:ubda|serclk ; ballctrl:ucpu|serve ; bain       ; bain     ; None                       ; None                       ; 3.700 ns                 ;
+------------------------------------------+-------------------+---------------------+------------+----------+----------------------------+----------------------------+--------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------+
; tco                                                                                                                                 ;
+-------+--------------+------------+-----------------------------------------------------------------------+------------+------------+
; Slack ; Required tco ; Actual tco ; From                                                                  ; To         ; From Clock ;
+-------+--------------+------------+-----------------------------------------------------------------------+------------+------------+
; N/A   ; None         ; 15.900 ns  ; cou4:uah|lpm_counter:qqout_rtl_0|alt_counter_f10ke:wysi_counter|q[1]  ; countah[1] ; bain       ;
; N/A   ; None         ; 15.400 ns  ; cou4:uah|lpm_counter:qqout_rtl_0|alt_counter_f10ke:wysi_counter|q[2]  ; countah[2] ; bain       ;
; N/A   ; None         ; 15.400 ns  ; cou4:uah|lpm_counter:qqout_rtl_0|alt_counter_f10ke:wysi_counter|q[0]  ; countah[0] ; bain       ;
; N/A   ; None         ; 15.000 ns  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[3]  ; countbh[3] ; bbin       ;
; N/A   ; None         ; 15.000 ns  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[0]  ; countbh[0] ; bbin       ;
; N/A   ; None         ; 14.700 ns  ; cou4:uah|lpm_counter:qqout_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; countah[3] ; bain       ;
; N/A   ; None         ; 14.600 ns  ; ballctrl:ucpu|ballen                                                  ; speaker    ; bbin       ;
; N/A   ; None         ; 14.600 ns  ; ballctrl:ucpu|ballen                                                  ; speaker    ; bain       ;
; N/A   ; None         ; 14.500 ns  ; ballctrl:ucpu|ballen                                                  ; speaker    ; clr        ;
; N/A   ; None         ; 14.200 ns  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[2]  ; countbh[2] ; bbin       ;
; N/A   ; None         ; 14.200 ns  ; cou4:ubh|lpm_counter:qqout_rtl_2|alt_counter_f10ke:wysi_counter|q[1]  ; countbh[1] ; bbin       ;
; N/A   ; None         ; 13.100 ns  ; cou10:ual|lpm_counter:qqout_rtl_1|alt_counter_f10ke:wysi_counter|q[2] ; countal[2] ; bain       ;
; N/A   ; None         ; 12.600 ns  ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[3] ; countbl[3] ; bbin       ;
; N/A   ; None         ; 12.600 ns  ; cou10:ual|lpm_counter:qqout_rtl_1|alt_counter_f10ke:wysi_counter|q[1] ; countal[1] ; bain       ;
; N/A   ; None         ; 12.600 ns  ; cou10:ual|lpm_counter:qqout_rtl_1|alt_counter_f10ke:wysi_counter|q[0] ; countal[0] ; bain       ;
; N/A   ; None         ; 11.900 ns  ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[2] ; countbl[2] ; bbin       ;
; N/A   ; None         ; 11.900 ns  ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[1] ; countbl[1] ; bbin       ;
; N/A   ; None         ; 11.900 ns  ; cou10:ubl|lpm_counter:qqout_rtl_3|alt_counter_f10ke:wysi_counter|q[0] ; countbl[0] ; bbin       ;
; N/A   ; None         ; 11.900 ns  ; cou10:ual|lpm_counter:qqout_rtl_1|alt_counter_f10ke:wysi_counter|q[3] ; countal[3] ; bain       ;
; N/A   ; None         ; 11.000 ns  ; ball:uball|lamp[6]                                                    ; ballout[5] ; clk        ;
; N/A   ; None         ; 11.000 ns  ; ball:uball|lamp[4]                                                    ; ballout[3] ; clk        ;
; N/A   ; None         ; 11.000 ns  ; ball:uball|lamp[2]                                                    ; ballout[1] ; clk        ;
; N/A   ; None         ; 11.000 ns  ; ball:uball|lamp[1]                                                    ; ballout[0] ; clk        ;
; N/A   ; None         ; 10.400 ns  ; ball:uball|lamp[8]                                                    ; ballout[7] ; clk        ;
; N/A   ; None         ; 10.400 ns  ; ball:uball|lamp[5]                                                    ; ballout[4] ; clk        ;
; N/A   ; None         ; 10.100 ns  ; ball:uball|lamp[7]                                                    ; ballout[6] ; clk        ;
; N/A   ; None         ; 10.100 ns  ; ball:uball|lamp[3]                                                    ; ballout[2] ; clk        ;