blank_project_0_syslib.sc

来自「FPGA的avalon总线的接口 pwm测试程序」· SC 代码 · 共 26 行

<?xml version="1.0" encoding="UTF-8"?>
<?scdStore version="2"?>

<scannerInfo id="org.eclipse.cdt.make.core.discoveredScannerInfo">
<collector id="org.eclipse.cdt.make.core.PerProjectSICollector">
<includePath path="d:/altera/72/quartus/bin/cygwin/lib/gcc/i686-pc-cygwin/3.4.4/include"/>
<includePath path="d:/altera/72/quartus/bin/cygwin/usr/include"/>
<includePath path="d:/altera/72/quartus/bin/cygwin/usr/include/w32api"/>
<includePath path="D:/altera/sun/avalon_pwm/blank_project_0_syslib"/>
<includePath path="D:/altera/sun/avalon_pwm/blank_project_0_syslib/Debug/system_description"/>
<includePath path="d:/altera/72/ip/sopc_builder_ip/altera_avalon_timer/HAL/inc"/>
<includePath path="d:/altera/72/ip/sopc_builder_ip/altera_avalon_timer/inc"/>
<includePath path="d:/altera/72/ip/sopc_builder_ip/altera_avalon_jtag_uart/HAL/inc"/>
<includePath path="d:/altera/72/ip/sopc_builder_ip/altera_avalon_jtag_uart/inc"/>
<includePath path="d:/altera/72/ip/nios2_ip/altera_nios2/HAL/inc"/>
<includePath path="d:/altera/72/nios2eds/components/altera_hal/HAL/inc"/>
<definedSymbol symbol="ALTERA_INCLUDES"/>
<definedSymbol symbol="SYSTEM_BUS_WIDTH=32"/>
<definedSymbol symbol="ALT_NO_INSTRUCTION_EMULATION"/>
<definedSymbol symbol="ALT_SINGLE_THREADED"/>
<definedSymbol symbol="__hal__"/>
<definedSymbol symbol="ALT_DEBUG"/>
<definedSymbol symbol="ALT_NO_C_PLUS_PLUS"/>
</collector>
</scannerInfo>