top.stp

sdram 控制器的verilog 实现

          <wire name="user_interface:inst3|setup_done" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[0]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[10]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[11]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[12]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[13]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[14]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[15]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[16]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[17]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[18]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[19]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[1]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[20]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[21]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[2]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[3]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[4]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[5]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[6]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[7]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[8]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|sys_addr[9]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|user_state.gen_read_req" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|user_state.gen_write_req" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|user_state.idle" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|user_state.wait_read_ack" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|user_state.wait_setup" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|user_state.wait_write_ack" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|w_data_valid" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|write_ack" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|write_req" tap_mode="classic" type="combinatorial"/>
        </trigger_input_vec>
        <data_input_vec>
          <wire name="sdram_addr[0]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[10]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[11]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[1]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[2]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[3]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[4]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[5]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[6]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[7]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[8]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[9]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_ba[0]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_ba[1]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_cas_n" tap_mode="classic" type="output pin"/>
          <wire name="sdram_cke" tap_mode="classic" type="output pin"/>
          <wire name="sdram_cs_n" tap_mode="classic" type="output pin"/>
          <wire name="sdram_data[0]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[10]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[11]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[12]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[13]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[14]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[15]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[1]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[2]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[3]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[4]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[5]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[6]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[7]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[8]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[9]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_dqm[0]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_dqm[1]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_ras_n" tap_mode="classic" type="output pin"/>
          <wire name="sdram_top:inst|main_fsm:U0|c_state[0]" tap_mode="classic" type="combinatorial"/>
          <wire name="sdram_top:inst|main_fsm:U0|c_state[1]" tap_mode="classic" type="combinatorial"/>
          <wire name="sdram_top:inst|main_fsm:U0|c_state[2]" tap_mode="classic" type="combinatorial"/>
          <wire name="sdram_top:inst|main_fsm:U0|c_state[3]" tap_mode="classic" type="combinatorial"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[0]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[1]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[2]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[3]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[4]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[5]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[6]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[7]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[8]" tap_mode="classic" type="register"/>
          <wire name="sdram_we_n" tap_mode="classic" type="output pin"/>
          <wire name="user_interface:inst3|data_from_sdram[0]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[10]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[11]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[12]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[13]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[14]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[15]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[1]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[2]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[3]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[4]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[5]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[6]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[7]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[8]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[9]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[0]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[10]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[11]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[12]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[13]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[14]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[15]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[1]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[2]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[3]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[4]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[5]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[6]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[7]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[8]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[9]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|r_data_valid" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|ram_addr[0]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[1]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[2]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[3]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[4]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[5]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[6]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[7]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[8]" tap_mode="classic" type="register"/>