top.stp

sdram 控制器的verilog 实现

<session jtag_chain="USB-Blaster [USB-0]" jtag_device="@1: EP1C6 (0x020820DD)" sof_file="top.sof" top_level_entity="top">
  <display_tree gui_logging_enabled="0">
    <display_branch instance="auto_signaltap_0" log="USE_GLOBAL_TEMP" signal_set="USE_GLOBAL_TEMP" trigger="USE_GLOBAL_TEMP"/>
  </display_tree>
  <instance compilation_mode="full" entity_name="sld_signaltap" is_auto_node="yes" is_expanded="true" name="auto_signaltap_0" source_file="sld_signaltap.vhd">
    <node_ip_info instance_id="0" mfg_id="110" node_id="0" version="6"/>
    <position_info>
      <single attribute="active tab" value="0"/>
      <single attribute="data horizontal scroll position" value="58"/>
      <single attribute="data vertical scroll position" value="0"/>
      <single attribute="setup horizontal scroll position" value="0"/>
      <single attribute="setup vertical scroll position" value="14"/>
      <single attribute="zoom level denominator" value="1"/>
      <single attribute="zoom level numerator" value="32"/>
      <single attribute="zoom offset denominator" value="1"/>
      <single attribute="zoom offset numerator" value="4080"/>
      <multi attribute="timebars" size="1" value="329"/>
    </position_info>
    <signal_set global_temp="1" name="signal_set: 2008/09/15 16:45:08  #0">
      <clock name="clk_50" polarity="posedge" tap_mode="classic"/>
      <config ram_type="M4K" reserved_data_nodes="0" reserved_trigger_nodes="0" sample_depth="512" trigger_in_enable="yes" trigger_in_node="user_interface:inst3|write_req" trigger_in_tap_mode="classic" trigger_out_enable="no"/>
      <top_entity/>
      <signal_vec>
        <trigger_input_vec>
          <wire name="sdram_addr[0]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[10]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[11]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[1]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[2]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[3]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[4]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[5]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[6]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[7]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[8]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_addr[9]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_ba[0]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_ba[1]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_cas_n" tap_mode="classic" type="output pin"/>
          <wire name="sdram_cke" tap_mode="classic" type="output pin"/>
          <wire name="sdram_cs_n" tap_mode="classic" type="output pin"/>
          <wire name="sdram_data[0]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[10]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[11]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[12]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[13]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[14]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[15]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[1]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[2]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[3]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[4]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[5]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[6]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[7]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[8]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_data[9]" tap_mode="classic" type="bidir pin"/>
          <wire name="sdram_dqm[0]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_dqm[1]" tap_mode="classic" type="output pin"/>
          <wire name="sdram_ras_n" tap_mode="classic" type="output pin"/>
          <wire name="sdram_top:inst|main_fsm:U0|c_state[0]" tap_mode="classic" type="combinatorial"/>
          <wire name="sdram_top:inst|main_fsm:U0|c_state[1]" tap_mode="classic" type="combinatorial"/>
          <wire name="sdram_top:inst|main_fsm:U0|c_state[2]" tap_mode="classic" type="combinatorial"/>
          <wire name="sdram_top:inst|main_fsm:U0|c_state[3]" tap_mode="classic" type="combinatorial"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[0]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[1]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[2]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[3]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[4]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[5]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[6]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[7]" tap_mode="classic" type="register"/>
          <wire name="sdram_top:inst|main_fsm:U0|clk_m_cnt[8]" tap_mode="classic" type="register"/>
          <wire name="sdram_we_n" tap_mode="classic" type="output pin"/>
          <wire name="user_interface:inst3|data_from_sdram[0]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[10]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[11]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[12]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[13]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[14]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[15]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[1]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[2]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[3]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[4]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[5]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[6]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[7]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[8]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_from_sdram[9]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[0]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[10]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[11]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[12]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[13]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[14]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[15]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[1]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[2]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[3]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[4]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[5]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[6]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[7]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[8]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|data_to_sdram[9]" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|r_data_valid" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|ram_addr[0]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[1]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[2]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[3]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[4]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[5]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[6]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[7]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|ram_addr[8]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|read_ack" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|read_req" tap_mode="classic" type="combinatorial"/>
          <wire name="user_interface:inst3|rom_addr[0]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|rom_addr[1]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|rom_addr[2]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|rom_addr[3]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|rom_addr[4]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|rom_addr[5]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|rom_addr[6]" tap_mode="classic" type="register"/>
          <wire name="user_interface:inst3|rom_addr[7]" tap_mode="classic" type="register"/>