top.map.rpt

sdram 控制器的verilog 实现

; lpm_counter.tdf                  ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/lpm_counter.tdf         ;
; lpm_constant.inc                 ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/lpm_constant.inc        ;
; lpm_decode.inc                   ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/lpm_decode.inc          ;
; lpm_add_sub.inc                  ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/lpm_add_sub.inc         ;
; cmpconst.inc                     ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/cmpconst.inc            ;
; lpm_compare.inc                  ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/lpm_compare.inc         ;
; lpm_counter.inc                  ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/lpm_counter.inc         ;
; dffeea.inc                       ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/dffeea.inc              ;
; alt_synch_counter.inc            ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/alt_synch_counter.inc   ;
; alt_synch_counter_f.inc          ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/alt_synch_counter_f.inc ;
; alt_counter_f10ke.inc            ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/alt_counter_f10ke.inc   ;
; alt_counter_stratix.inc          ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/alt_counter_stratix.inc ;
; db/cntr_vui.tdf                  ; yes             ; Auto-Generated Megafunction        ; E:/pratice/verilog/sdram_controller/sdram_all/db/cntr_vui.tdf                       ;
; altsyncram.tdf                   ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/altsyncram.tdf          ;
; stratix_ram_block.inc            ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/stratix_ram_block.inc   ;
; lpm_mux.inc                      ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/lpm_mux.inc             ;
; a_rdenreg.inc                    ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/a_rdenreg.inc           ;
; altrom.inc                       ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/altrom.inc              ;
; altram.inc                       ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/altram.inc              ;
; altdpram.inc                     ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/altdpram.inc            ;
; altqpram.inc                     ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/altqpram.inc            ;
; db/altsyncram_2361.tdf           ; yes             ; Auto-Generated Megafunction        ; E:/pratice/verilog/sdram_controller/sdram_all/db/altsyncram_2361.tdf                ;
; db/altsyncram_fk72.tdf           ; yes             ; Auto-Generated Megafunction        ; E:/pratice/verilog/sdram_controller/sdram_all/db/altsyncram_fk72.tdf                ;
; sld_mod_ram_rom.vhd              ; yes             ; Encrypted Megafunction             ; d:/program files/quartus7_2/quartus/libraries/megafunctions/sld_mod_ram_rom.vhd     ;
; sld_rom_sr.vhd                   ; yes             ; Encrypted Megafunction             ; d:/program files/quartus7_2/quartus/libraries/megafunctions/sld_rom_sr.vhd          ;
; db/altsyncram_0qe1.tdf           ; yes             ; Auto-Generated Megafunction        ; E:/pratice/verilog/sdram_controller/sdram_all/db/altsyncram_0qe1.tdf                ;
; db/altsyncram_e9a2.tdf           ; yes             ; Auto-Generated Megafunction        ; E:/pratice/verilog/sdram_controller/sdram_all/db/altsyncram_e9a2.tdf                ;
; sld_hub.vhd                      ; yes             ; Encrypted Megafunction             ; d:/program files/quartus7_2/quartus/libraries/megafunctions/sld_hub.vhd             ;
; lpm_shiftreg.tdf                 ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/lpm_shiftreg.tdf        ;
; lpm_decode.tdf                   ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/lpm_decode.tdf          ;
; declut.inc                       ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/declut.inc              ;
; altshift.inc                     ; yes             ; Megafunction                       ; d:/program files/quartus7_2/quartus/libraries/megafunctions/altshift.inc            ;
; db/decode_ogi.tdf                ; yes             ; Auto-Generated Megafunction        ; E:/pratice/verilog/sdram_controller/sdram_all/db/decode_ogi.tdf                     ;
; sld_dffex.vhd                    ; yes             ; Encrypted Megafunction             ; d:/program files/quartus7_2/quartus/libraries/megafunctions/sld_dffex.vhd           ;
+----------------------------------+-----------------+------------------------------------+-------------------------------------------------------------------------------------+


+------------------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary                            ;
+---------------------------------------------+--------------------------+
; Resource                                    ; Usage                    ;
+---------------------------------------------+--------------------------+
; Total logic elements                        ; 545                      ;
;     -- Combinational with no register       ; 238                      ;
;     -- Register only                        ; 45                       ;
;     -- Combinational with a register        ; 262                      ;
;                                             ;                          ;
; Logic element usage by number of LUT inputs ;                          ;
;     -- 4 input functions                    ; 203                      ;
;     -- 3 input functions                    ; 110                      ;
;     -- 2 input functions                    ; 177                      ;
;     -- 1 input functions                    ; 8                        ;
;     -- 0 input functions                    ; 2                        ;
;                                             ;                          ;
; Logic elements by mode                      ;                          ;
;     -- normal mode                          ; 428                      ;
;     -- arithmetic mode                      ; 117                      ;
;     -- qfbk mode                            ; 0                        ;
;     -- register cascade mode                ; 0                        ;
;     -- synchronous clear/load mode          ; 165                      ;
;     -- asynchronous clear/load mode         ; 98                       ;
;                                             ;                          ;
; Total registers                             ; 307                      ;
; Total logic cells in carry chains           ; 131                      ;
; I/O pins                                    ; 45                       ;
; Total memory bits                           ; 12288                    ;
; Total PLLs                                  ; 1                        ;
; Maximum fan-out node                        ; altera_internal_jtag~TDO ;
; Maximum fan-out                             ; 209                      ;
; Total fan-out                               ; 2975                     ;
; Average fan-out                             ; 4.77                     ;
+---------------------------------------------+--------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                                                                                                                                                                                                                                                    ;
+------------------------------------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; Compilation Hierarchy Node                                             ; Logic Cells ; LC Registers ; Memory Bits ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name                                                                                                                                                                      ; Library Name ;
+------------------------------------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; |top                                                                   ; 545 (3)     ; 307          ; 12288       ; 45   ; 0            ; 238 (3)      ; 45 (0)            ; 262 (0)          ; 131 (0)         ; 0 (0)      ; |top                                                                                                                                                                                     ; work         ;
;    |pll_50:inst1|                                                      ; 0 (0)       ; 0            ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 0 (0)            ; 0 (0)           ; 0 (0)      ; |top|pll_50:inst1                                                                                                                                                                        ; work         ;
;       |altpll:altpll_component|                                        ; 0 (0)       ; 0            ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 0 (0)            ; 0 (0)           ; 0 (0)      ; |top|pll_50:inst1|altpll:altpll_component                                                                                                                                                ; work         ;
;    |reset:inst2|                                                       ; 11 (1)      ; 9            ; 0           ; 0    ; 0            ; 2 (1)        ; 0 (0)             ; 9 (0)            ; 10 (0)          ; 0 (0)      ; |top|reset:inst2                                                                                                                                                                         ; work         ;
;       |counter:inst|                                                   ; 10 (0)      ; 9            ; 0           ; 0    ; 0            ; 1 (0)        ; 0 (0)             ; 9 (0)            ; 10 (0)          ; 0 (0)      ; |top|reset:inst2|counter:inst                                                                                                                                                            ; work         ;
;          |lpm_counter:lpm_counter_component|                           ; 10 (0)      ; 9            ; 0           ; 0    ; 0            ; 1 (0)        ; 0 (0)             ; 9 (0)            ; 10 (0)          ; 0 (0)      ; |top|reset:inst2|counter:inst|lpm_counter:lpm_counter_component                                                                                                                          ; work         ;
;             |cntr_vui:auto_generated|                                  ; 10 (10)     ; 9            ; 0           ; 0    ; 0            ; 1 (1)        ; 0 (0)             ; 9 (9)            ; 10 (10)         ; 0 (0)      ; |top|reset:inst2|counter:inst|lpm_counter:lpm_counter_component|cntr_vui:auto_generated                                                                                                  ; work         ;
;    |sdram_top:inst|                                                    ; 172 (0)     ; 70           ; 0           ; 0    ; 0            ; 102 (0)      ; 14 (0)            ; 56 (0)           ; 33 (0)          ; 0 (0)      ; |top|sdram_top:inst                                                                                                                                                                      ; work         ;
;       |init_fsm:U1|                                                    ; 51 (51)     ; 27           ; 0           ; 0    ; 0            ; 24 (24)      ; 4 (4)             ; 23 (23)          ; 14 (14)         ; 0 (0)      ; |top|sdram_top:inst|init_fsm:U1                                                                                                                                                          ; work         ;