rs232_rec5.qsf

VHDL语言实现的穿行通讯

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		rs232_rec5_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C5Q208C8
set_global_assignment -name TOP_LEVEL_ENTITY rs232_rec5
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "7.2 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:49:06  MARCH 24, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION "7.2 SP1"
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name ENABLE_INIT_DONE_OUTPUT OFF
set_location_assignment PIN_23 -to clk
set_location_assignment PIN_72 -to rst
set_location_assignment PIN_69 -to test_baud8x_p
set_location_assignment PIN_145 -to txd
set_location_assignment PIN_146 -to rxd
set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS1
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
set_location_assignment PIN_23 -to pin_clk
set_location_assignment PIN_72 -to pin_rst
set_location_assignment PIN_69 -to pin_test_baud8x_p
set_location_assignment PIN_146 -to pin_txd
set_location_assignment PIN_145 -to pin_rxd
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_location_assignment PIN_69 -to pin_p
set_location_assignment PIN_92 -to pin_baud
set_location_assignment PIN_76 -to pin_baud_rec
set_location_assignment PIN_57 -to data[7]
set_location_assignment PIN_59 -to data[6]
set_location_assignment PIN_61 -to data[5]
set_location_assignment PIN_74 -to data[4]
set_location_assignment PIN_87 -to data[3]
set_location_assignment PIN_97 -to data[2]
set_location_assignment PIN_99 -to data[1]
set_location_assignment PIN_101 -to data[0]
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name VHDL_FILE rs232_rec2.vhd
set_global_assignment -name BDF_FILE rs232_rec5.bdf
set_global_assignment -name TCL_SCRIPT_FILE rs232_rec5.tcl
set_global_assignment -name VECTOR_WAVEFORM_FILE rs232_rec5.vwf