zhiliu_dianji.hif

直流电机的VHDL源程序,经过编译和仿真.

result4
-1
3
result3
-1
3
result2
-1
3
result1
-1
3
result0
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab1
-1
3
datab0
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa1
-1
3
dataa0
-1
3
cout
-1
3
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
add_sub_adc
# storage
db|zhiliu_dianji.(28).cnf
db|zhiliu_dianji.(28).cnf
# case_insensitive
# source_file
db|add_sub_adc.tdf
5a3159fe671752e91d67b7848d43a49f
6
# used_port {
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result1
-1
3
result0
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab1
-1
3
datab0
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa1
-1
3
dataa0
-1
3
cout
-1
3
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_abs_1j9
# storage
db|zhiliu_dianji.(29).cnf
db|zhiliu_dianji.(29).cnf
# case_insensitive
# source_file
db|lpm_abs_1j9.tdf
3aa4b641c68831d2552521871df8124f
6
# used_port {
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result1
-1
3
result0
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data4
-1
3
data3
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
add_sub_15f
# storage
db|zhiliu_dianji.(30).cnf
db|zhiliu_dianji.(30).cnf
# case_insensitive
# source_file
db|add_sub_15f.tdf
e0851ece26628b72d23f924a20567d13
6
# used_port {
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result1
-1
3
result0
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab1
-1
3
datab0
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa1
-1
3
dataa0
-1
3
cin
-1
2
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_divide
# storage
db|zhiliu_dianji.(31).cnf
db|zhiliu_dianji.(31).cnf
# case_insensitive
# source_file
c:|altera|72|quartus|libraries|megafunctions|lpm_divide.tdf
706ba3e8b43cbca887f6dcfbde4d7290
6
# user_parameter {
LPM_WIDTHN
32
PARAMETER_UNKNOWN
USR
LPM_WIDTHD
11
PARAMETER_UNKNOWN
USR
LPM_NREPRESENTATION
SIGNED
PARAMETER_UNKNOWN
USR
LPM_DREPRESENTATION
SIGNED
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
LPM_REMAINDERPOSITIVE
FALSE
PARAMETER_UNKNOWN
USR
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
lpm_divide_2mo
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
quotient9
-1
3
quotient8
-1
3
quotient7
-1
3
quotient6
-1
3
quotient5
-1
3
quotient4
-1
3
quotient31
-1
3
quotient30
-1
3
quotient3
-1
3
quotient29
-1
3
quotient28
-1
3
quotient27
-1
3
quotient26
-1
3
quotient25
-1
3
quotient24
-1
3
quotient23
-1
3
quotient22
-1
3
quotient21
-1
3
quotient20
-1
3
quotient2
-1
3
quotient19
-1
3
quotient18
-1
3
quotient17
-1
3
quotient16
-1
3
quotient15
-1
3
quotient14
-1
3
quotient13
-1
3
quotient12
-1
3
quotient11
-1
3
quotient10
-1
3
quotient1
-1
3
quotient0
-1
3
numer9
-1
3
numer8
-1
3
numer7
-1
3
numer6
-1
3
numer5
-1
3
numer4
-1
3
numer31
-1
3
numer30
-1
3
numer3
-1
3
numer29
-1
3
numer28
-1
3
numer27
-1
3
numer26
-1
3
numer25
-1
3
numer24
-1
3
numer23
-1
3
numer22
-1
3
numer21
-1
3
numer20
-1
3
numer2
-1
3
numer19
-1
3
numer18
-1
3
numer17
-1
3
numer16
-1
3
numer15
-1
3
numer14
-1
3
numer13
-1
3
numer12
-1
3
numer11
-1
3
numer10
-1
3
numer1
-1
3
numer0
-1
3
denom4
-1
1
denom2
-1
1
denom10
-1
1
denom1
-1
1
denom0
-1
1
denom9
-1
2
denom8
-1
2
denom7
-1
2
denom6
-1
2
denom5
-1
2
denom3
-1
2
}
# include_file {
c:|altera|72|quartus|libraries|megafunctions|sign_div_unsign.inc
c1e17922387cb5d0c88d7fb673544bb4
c:|altera|72|quartus|libraries|megafunctions|abs_divider.inc
cdfefd53e136b3a8e541899b82db37d
c:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_divide_2mo
# storage
db|zhiliu_dianji.(32).cnf
db|zhiliu_dianji.(32).cnf
# case_insensitive
# source_file
db|lpm_divide_2mo.tdf
7ffda04b84d4b7af719674ccb6b2f
6
# used_port {
quotient9
-1
3
quotient8
-1
3
quotient7
-1
3
quotient6
-1
3
quotient5
-1
3
quotient4
-1
3
quotient31
-1
3
quotient30
-1
3
quotient3
-1
3
quotient29
-1
3
quotient28
-1
3
quotient27
-1
3
quotient26
-1
3
quotient25
-1
3
quotient24
-1
3
quotient23
-1
3
quotient22
-1
3
quotient21
-1
3
quotient20
-1
3
quotient2
-1
3
quotient19
-1
3
quotient18
-1
3
quotient17
-1
3
quotient16
-1
3
quotient15
-1
3
quotient14
-1
3
quotient13
-1
3
quotient12
-1
3
quotient11
-1
3
quotient10
-1
3
quotient1
-1
3
quotient0
-1
3
numer9
-1
3
numer8
-1
3
numer7
-1
3
numer6
-1
3
numer5
-1
3
numer4
-1
3
numer31
-1
3
numer30
-1
3
numer3
-1
3
numer29
-1
3
numer28
-1
3
numer27
-1
3
numer26
-1
3
numer25
-1
3
numer24
-1
3
numer23
-1
3
numer22
-1
3
numer21
-1
3
numer20
-1
3
numer2
-1
3
numer19
-1
3
numer18
-1
3
numer17
-1
3
numer16
-1
3
numer15
-1
3
numer14
-1
3
numer13
-1
3
numer12
-1
3
numer11
-1
3
numer10
-1
3
numer1
-1
3
numer0
-1
3
denom9
-1
3
denom8
-1
3
denom7
-1
3
denom6
-1
3
denom5
-1
3
denom4
-1
3
denom3
-1
3
denom2
-1
3
denom10
-1
3
denom1
-1
3
denom0
-1
3
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
abs_divider_1dg
# storage
db|zhiliu_dianji.(33).cnf
db|zhiliu_dianji.(33).cnf
# case_insensitive
# source_file
db|abs_divider_1dg.tdf
75aad29b178dbcbad37faa5a7c1b95
6
# used_port {
remainder9
-1
3
remainder8
-1
3
remainder7
-1
3
remainder6
-1
3
remainder5
-1
3
remainder4
-1
3
remainder3
-1
3
remainder2
-1
3
remainder10
-1
3
remainder1
-1
3
remainder0
-1
3
quotient9
-1
3
quotient8
-1
3
quotient7
-1
3
quotient6
-1
3
quotient5
-1
3
quotient4
-1
3
quotient31
-1
3
quotient30
-1
3
quotient3
-1
3
quotient29
-1
3
quotient28
-1
3
quotient27
-1
3
quotient26
-1
3
quotient25
-1
3
quotient24
-1
3
quotient23
-1
3
quotient22
-1
3
quotient21
-1
3
quotient20
-1
3
quotient2
-1
3
quotient19
-1
3
quotient18
-1
3
quotient17
-1
3
quotient16
-1
3
quotient15
-1
3
quotient14
-1
3
quotient13
-1
3
quotient12
-1
3
quotient11
-1
3
quotient10
-1
3
quotient1
-1
3
quotient0
-1
3
numerator9
-1
3
numerator8
-1
3
numerator7
-1
3
numerator6
-1
3
numerator5
-1
3
numerator4
-1
3
numerator31
-1
3
numerator30
-1
3
numerator3
-1
3
numerator29
-1
3
numerator28
-1
3
numerator27
-1
3
numerator26
-1
3
numerator25
-1
3
numerator24
-1
3
numerator23
-1
3
numerator22
-1
3
numerator21
-1
3
numerator20
-1
3
numerator2
-1
3
numerator19
-1
3
numerator18
-1
3
numerator17
-1
3
numerator16
-1
3
numerator15
-1
3
numerator14
-1
3
numerator13
-1
3
numerator12
-1
3
numerator11
-1
3
numerator10
-1
3
numerator1
-1
3
numerator0
-1
3
denominator9
-1
3
denominator8
-1
3
denominator7
-1
3
denominator6
-1
3
denominator5
-1
3
denominator4
-1
3
denominator3
-1
3
denominator2
-1
3
denominator10
-1
3
denominator1
-1
3
denominator0
-1
3
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
alt_u_div_ste
# storage
db|zhiliu_dianji.(34).cnf
db|zhiliu_dianji.(34).cnf
# case_insensitive
# source_file
db|alt_u_div_ste.tdf
283b34e436f265823ed89fd238281a
6
# used_port {
remainder9
-1
3
remainder8
-1
3
remainder7
-1
3
remainder6
-1
3
remainder5
-1
3
remainder4
-1
3
remainder3
-1
3
remainder2
-1
3
remainder10
-1
3
remainder1
-1
3
remainder0
-1
3
quotient9
-1
3
quotient8
-1
3
quotient7
-1
3
quotient6
-1
3
quotient5
-1
3
quotient4
-1
3
quotient31
-1
3
quotient30
-1
3
quotient3
-1
3
quotient29
-1
3
quotient28
-1
3
quotient27
-1
3
quotient26
-1
3
quotient25
-1
3
quotient24
-1
3
quotient23
-1
3
quotient22
-1
3
quotient21
-1
3
quotient20
-1
3
quotient2
-1
3
quotient19
-1
3
quotient18
-1
3
quotient17
-1
3
quotient16
-1
3
quotient15
-1
3
quotient14
-1
3
quotient13
-1
3
quotient12
-1
3
quotient11
-1
3
quotient10
-1
3
quotient1
-1
3
quotient0
-1
3
numerator9
-1
3
numerator8
-1
3
numerator7
-1
3
numerator6
-1
3
numerator5
-1
3
numerator4
-1
3
numerator31
-1
3
numerator30
-1
3
numerator3
-1
3
numerator29
-1
3
numerator28
-1
3
numerator27
-1
3
numerator26
-1
3
numerator25
-1
3
numerator24
-1
3
numerator23
-1
3
numerator22
-1
3
numerator21
-1
3
numerator20
-1
3
numerator2
-1
3
numerator19
-1
3
numerator18
-1
3
numerator17
-1
3
numerator16
-1
3
numerator15
-1
3
numerator14
-1
3
numerator13
-1
3
numerator12
-1
3
numerator11
-1
3
numerator10
-1
3
numerator1
-1
3
numerator0
-1
3
denominator9
-1
3
denominator8
-1
3
denominator7
-1
3
denominator6
-1
3
denominator5
-1
3
denominator4
-1
3
denominator3
-1
3
denominator2
-1
3
denominator10
-1
3
denominator1
-1
3
denominator0
-1
3
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
add_sub_kec
# storage
db|zhiliu_dianji.(35).cnf
db|zhiliu_dianji.(35).cnf
# case_insensitive
# source_file
db|add_sub_kec.tdf
10af7463c54b2c8ead5d601273c61a5
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
cout
-1
3
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
add_sub_lec
# storage
db|zhiliu_dianji.(36).cnf
db|zhiliu_dianji.(36).cnf
# case_insensitive
# source_file
db|add_sub_lec.tdf
7667ceb02b7511652ac1ce6f337b24f3
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3