pxi_dsp_da.tan.rpt

来自「双口RAM与PXI总线接口设计」· RPT 代码 · 共 253 行 · 第 1/5 页

RPT
253 行
字号
12345
; R/W             ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
; A13             ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
; MEMW            ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
; Yx1             ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'DSP_CLOCK'                                                                                                                                                                                                                                                                                                                                    ;
+-------+----------------------------------+---------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------+------------+-----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period)             ; From                                                                                                          ; To                                                                                  ; From Clock ; To Clock  ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-------+----------------------------------+---------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------+------------+-----------+-----------------------------+---------------------------+-------------------------+
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg0  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[15] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg1  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[15] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg2  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[15] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg3  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[15] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg4  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[15] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg5  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[15] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg6  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[15] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg7  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[15] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg8  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[15] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg9  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[15] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg10 ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[15] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg0  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[14] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg1  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[14] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg2  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[14] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg3  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[14] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg4  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[14] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg5  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[14] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg6  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[14] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg7  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[14] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg8  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[14] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg9  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[14] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a15~portb_address_reg10 ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[14] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg0  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[13] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg1  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[13] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg2  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[13] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg3  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[13] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg4  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[13] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg5  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[13] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg6  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[13] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg7  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[13] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg8  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[13] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg9  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[13] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg10 ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[13] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg0  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[12] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg1  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[12] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg2  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[12] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg3  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[12] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg4  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[12] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
; N/A   ; 255.95 MHz ( period = 3.907 ns ) ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ram_block1a13~portb_address_reg5  ; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|q_b[12] ; DSP_CLOCK  ; DSP_CLOCK ; None                        ; None                      ; 3.323 ns                ;
12345

pxi_dsp_da.tan.rpt - 源码说明

本页面展示了「双口RAM与PXI总线接口设计」中的 pxi_dsp_da.tan.rpt 源码文件，采用 RPT 编程语言编写，共 253 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

虫虫开发者社区收录了大量与双口RAM相关的技术资源，包括源代码、技术文档、电路图等，是电子工程师和嵌入式开发者的专业学习平台。

⌨️ 快捷键说明

复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?