📄 pxi_dsp_da.map.rpt
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; OPERATION_MODE ; DUAL_PORT ; Untyped ;
; WIDTH_A ; 16 ; Signed Integer ;
; WIDTHAD_A ; 11 ; Signed Integer ;
; NUMWORDS_A ; 2048 ; Signed Integer ;
; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
; ADDRESS_ACLR_A ; NONE ; Untyped ;
; OUTDATA_ACLR_A ; NONE ; Untyped ;
; WRCONTROL_ACLR_A ; NONE ; Untyped ;
; INDATA_ACLR_A ; NONE ; Untyped ;
; BYTEENA_ACLR_A ; NONE ; Untyped ;
; WIDTH_B ; 16 ; Signed Integer ;
; WIDTHAD_B ; 11 ; Signed Integer ;
; NUMWORDS_B ; 2048 ; Signed Integer ;
; INDATA_REG_B ; CLOCK1 ; Untyped ;
; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
; ADDRESS_REG_B ; CLOCK1 ; Untyped ;
; OUTDATA_REG_B ; CLOCK1 ; Untyped ;
; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
; INDATA_ACLR_B ; NONE ; Untyped ;
; WRCONTROL_ACLR_B ; NONE ; Untyped ;
; ADDRESS_ACLR_B ; NONE ; Untyped ;
; OUTDATA_ACLR_B ; NONE ; Untyped ;
; RDCONTROL_ACLR_B ; NONE ; Untyped ;
; BYTEENA_ACLR_B ; NONE ; Untyped ;
; WIDTH_BYTEENA_A ; 1 ; Signed Integer ;
; WIDTH_BYTEENA_B ; 1 ; Untyped ;
; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
; BYTE_SIZE ; 8 ; Untyped ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
; INIT_FILE ; UNUSED ; Untyped ;
; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
; MAXIMUM_DEPTH ; 0 ; Untyped ;
; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ;
; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
; ENABLE_ECC ; FALSE ; Untyped ;
; DEVICE_FAMILY ; Cyclone ; Untyped ;
; CBXI_PARAMETER ; altsyncram_mrg1 ; Untyped ;
+------------------------------------+----------------------+-------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: ram2:inst3|alt3pram:alt3pram_component ;
+------------------------+----------+-------------------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------+----------+-------------------------------------------------+
; WIDTH_BYTEENA ; 1 ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; WIDTH ; 8 ; Signed Integer ;
; WIDTHAD ; 11 ; Signed Integer ;
; NUMWORDS ; 2048 ; Untyped ;
; LPM_FILE ; UNUSED ; Untyped ;
; INDATA_REG ; INCLOCK ; Untyped ;
; INDATA_ACLR ; OFF ; Untyped ;
; WRITE_REG ; INCLOCK ; Untyped ;
; WRITE_ACLR ; OFF ; Untyped ;
; RDADDRESS_REG_A ; OUTCLOCK ; Untyped ;
; RDADDRESS_ACLR_A ; OFF ; Untyped ;
; RDCONTROL_REG_A ; OUTCLOCK ; Untyped ;
; RDCONTROL_ACLR_A ; OFF ; Untyped ;
; OUTDATA_REG_A ; OUTCLOCK ; Untyped ;
; OUTDATA_ACLR_A ; OFF ; Untyped ;
; RDADDRESS_REG_B ; OUTCLOCK ; Untyped ;
; RDADDRESS_ACLR_B ; OFF ; Untyped ;
; RDCONTROL_REG_B ; OUTCLOCK ; Untyped ;
; RDCONTROL_ACLR_B ; OFF ; Untyped ;
; OUTDATA_REG_B ; OUTCLOCK ; Untyped ;
; OUTDATA_ACLR_B ; OFF ; Untyped ;
; USE_EAB ; ON ; Untyped ;
; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
; MAXIMUM_DEPTH ; 0 ; Untyped ;
; DEVICE_FAMILY ; Cyclone ; Untyped ;
+------------------------+----------+-------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 7.2 Build 151 09/26/2007 SJ Full Version
Info: Processing started: Thu Oct 11 10:42:14 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off pxi_dsp_da -c pxi_dsp_da
Info: Found 1 design units, including 1 entities, in source file pxi_dsp_da.bdf
Info: Found entity 1: pxi_dsp_da
Info: Elaborating entity "pxi_dsp_da" for the top level hierarchy
Warning: Processing legacy GDF or BDF entity "pxi_dsp_da" with Max+Plus II bus and instance naming rules
Warning: Using design file log_ctrl_da.bdf, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
Info: Found entity 1: log_ctrl_da
Info: Elaborating entity "log_ctrl_da" for hierarchy "log_ctrl_da:inst7"
Warning: Processing legacy GDF or BDF entity "log_ctrl_da" with Max+Plus II bus and instance naming rules
Warning: Using design file CNT12.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
Info: Found design unit 1: CNT12-behav
Info: Found entity 1: CNT12
Info: Elaborating entity "CNT12" for hierarchy "CNT12:inst2"
Warning: Using design file ram_da.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
Info: Found design unit 1: ram_da-SYN
Info: Found entity 1: ram_da
Info: Elaborating entity "ram_da" for hierarchy "ram_da:inst6"
Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf
Info: Found entity 1: altsyncram
Info: Elaborating entity "altsyncram" for hierarchy "ram_da:inst6|altsyncram:altsyncram_component"
Info: Elaborated megafunction instantiation "ram_da:inst6|altsyncram:altsyncram_component"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_mrg1.tdf
Info: Found entity 1: altsyncram_mrg1
Info: Elaborating entity "altsyncram_mrg1" for hierarchy "ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated"
Warning: Using design file ram2.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
Info: Found design unit 1: ram2-SYN
Info: Found entity 1: ram2
Info: Elaborating entity "ram2" for hierarchy "ram2:inst3"
Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/alt3pram.tdf
Info: Found entity 1: alt3pram
Info: Elaborating entity "alt3pram" for hierarchy "ram2:inst3|alt3pram:alt3pram_component"
Info: Elaborated megafunction instantiation "ram2:inst3|alt3pram:alt3pram_component"
Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/altdpram.tdf
Info: Found entity 1: altdpram
Info: Elaborating entity "altdpram" for hierarchy "ram2:inst3|alt3pram:alt3pram_component|altdpram:altdpram_component1"
Info: Elaborated megafunction instantiation "ram2:inst3|alt3pram:alt3pram_component|altdpram:altdpram_component1", which is child of megafunction instantiation "ram2:inst3|alt3pram:alt3pram_component"
Info: Instantiated megafunction "ram2:inst3|alt3pram:alt3pram_component" with the following parameter:
Info: Parameter "indata_aclr" = "OFF"
Info: Parameter "indata_reg" = "INCLOCK"
Info: Parameter "intended_device_family" = "Cyclone"
Info: Parameter "lpm_type" = "alt3pram"
Info: Parameter "outdata_aclr_a" = "OFF"
Info: Parameter "outdata_aclr_b" = "OFF"
Info: Parameter "outdata_reg_a" = "OUTCLOCK"
Info: Parameter "outdata_reg_b" = "OUTCLOCK"
Info: Parameter "rdaddress_aclr_a" = "OFF"
Info: Parameter "rdaddress_aclr_b" = "OFF"
Info: Parameter "rdaddress_reg_a" = "OUTCLOCK"
Info: Parameter "rdaddress_reg_b" = "OUTCLOCK"
Info: Parameter "rdcontrol_aclr_a" = "OFF"
Info: Parameter "rdcontrol_aclr_b" = "OFF"
Info: Parameter "rdcontrol_reg_a" = "OUTCLOCK"
Info: Parameter "rdcontrol_reg_b" = "OUTCLOCK"
Info: Parameter "width" = "8"
Info: Parameter "widthad" = "11"
Info: Parameter "write_aclr" = "OFF"
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