📄 pxi_dsp_da.map.rpt
字号:
; db/altsyncram_mrg1.tdf ; yes ; Auto-Generated Megafunction ; H:/U2/project/RAM/db/altsyncram_mrg1.tdf ;
; ram2.vhd ; yes ; Other ; H:/U2/project/RAM/ram2.vhd ;
; alt3pram.tdf ; yes ; Megafunction ; c:/altera/72/quartus/libraries/megafunctions/alt3pram.tdf ;
; altdpram.tdf ; yes ; Megafunction ; c:/altera/72/quartus/libraries/megafunctions/altdpram.tdf ;
; memmodes.inc ; yes ; Megafunction ; c:/altera/72/quartus/libraries/others/maxplus2/memmodes.inc ;
; a_hdffe.inc ; yes ; Megafunction ; c:/altera/72/quartus/libraries/megafunctions/a_hdffe.inc ;
; alt_le_rden_reg.inc ; yes ; Megafunction ; c:/altera/72/quartus/libraries/megafunctions/alt_le_rden_reg.inc ;
; altsyncram.inc ; yes ; Megafunction ; c:/altera/72/quartus/libraries/megafunctions/altsyncram.inc ;
; db/altsyncram_5bp1.tdf ; yes ; Auto-Generated Megafunction ; H:/U2/project/RAM/db/altsyncram_5bp1.tdf ;
; log_ctrl_m.bdf ; yes ; Other ; H:/U2/project/RAM/log_ctrl_m.bdf ;
; tri_s8_1.vhd ; yes ; Other ; H:/U2/project/RAM/tri_s8_1.vhd ;
; tri_s8.vhd ; yes ; Other ; H:/U2/project/RAM/tri_s8.vhd ;
; tri_s11.vhd ; yes ; Other ; H:/U2/project/RAM/tri_s11.vhd ;
; tri_s11_1.vhd ; yes ; Other ; H:/U2/project/RAM/tri_s11_1.vhd ;
+----------------------------------+-----------------+------------------------------------+--------------------------------------------------------------------+
+---------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+---------------------------------------------+-----------+
; Resource ; Usage ;
+---------------------------------------------+-----------+
; Total logic elements ; 23 ;
; -- Combinational with no register ; 23 ;
; -- Register only ; 0 ;
; -- Combinational with a register ; 0 ;
; ; ;
; Logic element usage by number of LUT inputs ; ;
; -- 4 input functions ; 9 ;
; -- 3 input functions ; 11 ;
; -- 2 input functions ; 2 ;
; -- 1 input functions ; 0 ;
; -- 0 input functions ; 1 ;
; ; ;
; Logic elements by mode ; ;
; -- normal mode ; 23 ;
; -- arithmetic mode ; 0 ;
; -- qfbk mode ; 0 ;
; -- register cascade mode ; 0 ;
; -- synchronous clear/load mode ; 0 ;
; -- asynchronous clear/load mode ; 0 ;
; ; ;
; Total registers ; 0 ;
; I/O pins ; 94 ;
; Total memory bits ; 65536 ;
; Maximum fan-out node ; DSP_AB[0] ;
; Maximum fan-out ; 25 ;
; Total fan-out ; 779 ;
; Average fan-out ; 5.23 ;
+---------------------------------------------+-----------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+-------------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------+
; Compilation Hierarchy Node ; Logic Cells ; LC Registers ; Memory Bits ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name ; Library Name ;
+-------------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------+
; |pxi_dsp_da ; 23 (12) ; 0 ; 65536 ; 94 ; 0 ; 23 (12) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |pxi_dsp_da ; work ;
; |log_ctrl_m:inst| ; 3 (3) ; 0 ; 0 ; 0 ; 0 ; 3 (3) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |pxi_dsp_da|log_ctrl_m:inst ; work ;
; |ram2:inst3| ; 0 (0) ; 0 ; 32768 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |pxi_dsp_da|ram2:inst3 ; work ;
; |alt3pram:alt3pram_component| ; 0 (0) ; 0 ; 32768 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |pxi_dsp_da|ram2:inst3|alt3pram:alt3pram_component ; work ;
; |altdpram:altdpram_component1| ; 0 (0) ; 0 ; 16384 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |pxi_dsp_da|ram2:inst3|alt3pram:alt3pram_component|altdpram:altdpram_component1 ; work ;
; |altsyncram:ram_block| ; 0 (0) ; 0 ; 16384 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |pxi_dsp_da|ram2:inst3|alt3pram:alt3pram_component|altdpram:altdpram_component1|altsyncram:ram_block ; work ;
; |altsyncram_5bp1:auto_generated| ; 0 (0) ; 0 ; 16384 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |pxi_dsp_da|ram2:inst3|alt3pram:alt3pram_component|altdpram:altdpram_component1|altsyncram:ram_block|altsyncram_5bp1:auto_generated ; work ;
; |altdpram:altdpram_component2| ; 0 (0) ; 0 ; 16384 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |pxi_dsp_da|ram2:inst3|alt3pram:alt3pram_component|altdpram:altdpram_component2 ; work ;
; |altsyncram:ram_block| ; 0 (0) ; 0 ; 16384 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |pxi_dsp_da|ram2:inst3|alt3pram:alt3pram_component|altdpram:altdpram_component2|altsyncram:ram_block ; work ;
; |altsyncram_5bp1:auto_generated| ; 0 (0) ; 0 ; 16384 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |pxi_dsp_da|ram2:inst3|alt3pram:alt3pram_component|altdpram:altdpram_component2|altsyncram:ram_block|altsyncram_5bp1:auto_generated ; work ;
; |ram_da:inst6| ; 0 (0) ; 0 ; 32768 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |pxi_dsp_da|ram_da:inst6 ; work ;
; |altsyncram:altsyncram_component| ; 0 (0) ; 0 ; 32768 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |pxi_dsp_da|ram_da:inst6|altsyncram:altsyncram_component ; work ;
; |altsyncram_mrg1:auto_generated| ; 0 (0) ; 0 ; 32768 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |pxi_dsp_da|ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated ; work ;
; |tri_s8:inst10| ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 8 (8) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |pxi_dsp_da|tri_s8:inst10 ; work ;
+-------------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary ;
+------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+------+
; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ;
+------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+------+
; ram2:inst3|alt3pram:alt3pram_component|altdpram:altdpram_component1|altsyncram:ram_block|altsyncram_5bp1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 2048 ; 8 ; 2048 ; 8 ; 16384 ; None ;
; ram2:inst3|alt3pram:alt3pram_component|altdpram:altdpram_component2|altsyncram:ram_block|altsyncram_5bp1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 2048 ; 8 ; 2048 ; 8 ; 16384 ; None ;
; ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 2048 ; 16 ; 2048 ; 16 ; 32768 ; None ;
+------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+------+
+---------------------------------------------------------------------------------+
; Registers Removed During Synthesis ;
+----------------------------------------+----------------------------------------+
; Register name ; Reason for Removal ;
+----------------------------------------+----------------------------------------+
; CNT12:inst2|CQI[0..10] ; Stuck at GND due to stuck port data_in ;
; Total Number of Removed Registers = 11 ; ;
+----------------------------------------+----------------------------------------+
+------------------------------------------------------+
; General Register Statistics ;
+----------------------------------------------+-------+
; Statistic ; Value ;
+----------------------------------------------+-------+
; Total registers ; 0 ;
; Number of registers using Synchronous Clear ; 0 ;
; Number of registers using Synchronous Load ; 0 ;
; Number of registers using Asynchronous Clear ; 0 ;
; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 0 ;
; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+
+----------------------------------------------------------------------------------------------------+
; Source assignments for ram_da:inst6|altsyncram:altsyncram_component|altsyncram_mrg1:auto_generated ;
+---------------------------------+--------------------+------+--------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+--------------------+------+--------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
+---------------------------------+--------------------+------+--------------------------------------+
+------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for ram2:inst3|alt3pram:alt3pram_component|altdpram:altdpram_component1|altsyncram:ram_block|altsyncram_5bp1:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------+
+------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for ram2:inst3|alt3pram:alt3pram_component|altdpram:altdpram_component2|altsyncram:ram_block|altsyncram_5bp1:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------+
+-------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: ram_da:inst6|altsyncram:altsyncram_component ;
+------------------------------------+----------------------+-------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------------------+----------------------+-------------------------------+
; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; WIDTH_BYTEENA ; 1 ; Untyped ;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -