clock.drc

XLINX做的数字钟

WARNING:PhysDesignRules:372 - Gated clock. Clock net XLXN_56 is sourced by a
   combinatorial pin. This is not good design practice. Use the CE pin to
   control the loading of data into the flip-flop.
WARNING:PhysDesignRules:372 - Gated clock. Clock net XLXN_83 is sourced by a
   combinatorial pin. This is not good design practice. Use the CE pin to
   control the loading of data into the flip-flop.
DRC detected 0 errors and 2 warnings.