de2_default.map.qmsg

The VGA example generates a 320x240 diffusion-limited-aggregation (DLA) on Altera DE2 board. A DLA i

{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "IRDA_RXD DE2_Default.v(193) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(193): object \"IRDA_RXD\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 193 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "DRAM_ADDR DE2_Default.v(196) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(196): object \"DRAM_ADDR\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 196 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "DRAM_LDQM DE2_Default.v(197) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(197): object \"DRAM_LDQM\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 197 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "DRAM_UDQM DE2_Default.v(198) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(198): object \"DRAM_UDQM\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 198 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "DRAM_WE_N DE2_Default.v(199) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(199): object \"DRAM_WE_N\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 199 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "DRAM_CAS_N DE2_Default.v(200) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(200): object \"DRAM_CAS_N\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 200 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "DRAM_RAS_N DE2_Default.v(201) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(201): object \"DRAM_RAS_N\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 201 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "DRAM_CS_N DE2_Default.v(202) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(202): object \"DRAM_CS_N\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 202 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "DRAM_BA_0 DE2_Default.v(203) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(203): object \"DRAM_BA_0\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 203 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "DRAM_BA_1 DE2_Default.v(204) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(204): object \"DRAM_BA_1\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 204 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "DRAM_CLK DE2_Default.v(205) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(205): object \"DRAM_CLK\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 205 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "DRAM_CKE DE2_Default.v(206) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(206): object \"DRAM_CKE\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 206 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "FL_ADDR DE2_Default.v(209) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(209): object \"FL_ADDR\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 209 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "FL_WE_N DE2_Default.v(210) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(210): object \"FL_WE_N\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 210 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "FL_RST_N DE2_Default.v(211) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(211): object \"FL_RST_N\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 211 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "FL_OE_N DE2_Default.v(212) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(212): object \"FL_OE_N\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 212 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "FL_CE_N DE2_Default.v(213) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(213): object \"FL_CE_N\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 213 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "OTG_ADDR DE2_Default.v(224) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(224): object \"OTG_ADDR\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 224 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "OTG_CS_N DE2_Default.v(225) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(225): object \"OTG_CS_N\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 225 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "OTG_RD_N DE2_Default.v(226) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(226): object \"OTG_RD_N\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 226 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "OTG_WR_N DE2_Default.v(227) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(227): object \"OTG_WR_N\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 227 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "OTG_RST_N DE2_Default.v(228) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(228): object \"OTG_RST_N\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 228 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "OTG_FSPEED DE2_Default.v(229) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(229): object \"OTG_FSPEED\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 229 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "OTG_LSPEED DE2_Default.v(230) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(230): object \"OTG_LSPEED\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 230 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "OTG_INT0 DE2_Default.v(231) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(231): object \"OTG_INT0\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 231 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "OTG_INT1 DE2_Default.v(232) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(232): object \"OTG_INT1\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 232 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "OTG_DREQ0 DE2_Default.v(233) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(233): object \"OTG_DREQ0\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 233 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "OTG_DREQ1 DE2_Default.v(234) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(234): object \"OTG_DREQ1\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 234 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "OTG_DACK0_N DE2_Default.v(235) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(235): object \"OTG_DACK0_N\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 235 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "OTG_DACK1_N DE2_Default.v(236) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(236): object \"OTG_DACK1_N\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 236 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "LCD_DATA DE2_Default.v(238) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(238): object \"LCD_DATA\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 238 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "LCD_RW DE2_Default.v(241) " "Info (10035): Verilog HDL or VHDL information at DE2_Default.v(241): object \"LCD_RW\" declared but not used" {  } { { "DE2_Default.v" "" { Text "C:/Documents and Settings/Bruce Land/My Documents/EEdocs/ECE576/DE2/MyExamples/DE2_VGA3/DE2_Default.v" 241 0 0 } }  } 0 10035 "Verilog HDL or VHDL information at %2!s!: object \"%1!s!\" declared but not used" 0 0}