de2_default.fit.talkback.xml

The VGA example generates a 320x240 diffusion-limited-aggregation (DLA) on Altera DE2 board. A DLA i

		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[16]</name>
		<pin__>V1</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>12</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[17]</name>
		<pin__>V2</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>12</y_coordinate>
		<cell_number>3</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[1]</name>
		<pin__>N26</pin__>
		<i_o_bank>5</i_o_bank>
		<x_coordinate>65</x_coordinate>
		<y_coordinate>19</y_coordinate>
		<cell_number>1</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[2]</name>
		<pin__>P25</pin__>
		<i_o_bank>6</i_o_bank>
		<x_coordinate>65</x_coordinate>
		<y_coordinate>19</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[3]</name>
		<pin__>AE14</pin__>
		<i_o_bank>7</i_o_bank>
		<x_coordinate>33</x_coordinate>
		<y_coordinate>0</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[4]</name>
		<pin__>AF14</pin__>
		<i_o_bank>7</i_o_bank>
		<x_coordinate>33</x_coordinate>
		<y_coordinate>0</y_coordinate>
		<cell_number>1</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[5]</name>
		<pin__>AD13</pin__>
		<i_o_bank>8</i_o_bank>
		<x_coordinate>33</x_coordinate>
		<y_coordinate>0</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[6]</name>
		<pin__>AC13</pin__>
		<i_o_bank>8</i_o_bank>
		<x_coordinate>33</x_coordinate>
		<y_coordinate>0</y_coordinate>
		<cell_number>3</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[7]</name>
		<pin__>C13</pin__>
		<i_o_bank>3</i_o_bank>
		<x_coordinate>31</x_coordinate>
		<y_coordinate>36</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[8]</name>
		<pin__>B13</pin__>
		<i_o_bank>4</i_o_bank>
		<x_coordinate>31</x_coordinate>
		<y_coordinate>36</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[9]</name>
		<pin__>A13</pin__>
		<i_o_bank>4</i_o_bank>
		<x_coordinate>31</x_coordinate>
		<y_coordinate>36</y_coordinate>
		<cell_number>1</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>TCK</name>
		<pin__>D14</pin__>
		<i_o_bank>4</i_o_bank>
		<x_coordinate>33</x_coordinate>
		<y_coordinate>36</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>TCS</name>
		<pin__>A14</pin__>
		<i_o_bank>4</i_o_bank>
		<x_coordinate>33</x_coordinate>
		<y_coordinate>36</y_coordinate>
		<cell_number>1</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>TDI</name>
		<pin__>B14</pin__>
		<i_o_bank>4</i_o_bank>
		<x_coordinate>33</x_coordinate>
		<y_coordinate>36</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>TD_DATA[0]</name>
		<pin__>J9</pin__>
		<i_o_bank>3</i_o_bank>
		<x_coordinate>5</x_coordinate>
		<y_coordinate>36</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>TD_DATA[1]</name>
		<pin__>E8</pin__>
		<i_o_bank>3</i_o_bank>
		<x_coordinate>7</x_coordinate>
		<y_coordinate>36</y_coordinate>
		<cell_number>3</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>TD_DATA[2]</name>
		<pin__>H8</pin__>
		<i_o_bank>3</i_o_bank>
		<x_coordinate>7</x_coordinate>
		<y_coordinate>36</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>TD_DATA[3]</name>
		<pin__>H10</pin__>
		<i_o_bank>3</i_o_bank>
		<x_coordinate>7</x_coordinate>
		<y_coordinate>36</y_coordinate>
		<cell_number>1</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>TD_DATA[4]</name>
		<pin__>G9</pin__>
		<i_o_bank>3</i_o_bank>
		<x_coordinate>7</x_coordinate>
		<y_coordinate>36</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>TD_DATA[5]</name>
		<pin__>F9</pin__>
		<i_o_bank>3</i_o_bank>
		<x_coordinate>9</x_coordinate>
		<y_coordinate>36</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>TD_DATA[6]</name>
		<pin__>D7</pin__>
		<i_o_bank>3</i_o_bank>
		<x_coordinate>9</x_coordinate>
		<y_coordinate>36</y_coordinate>
		<cell_number>1</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>