de2_default.fit.talkback.xml

The VGA example generates a 320x240 diffusion-limited-aggregation (DLA) on Altera DE2 board. A DLA i

		<cell_number>3</cell_number>
		<combinational_fan_out>1</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>CLOCK_50</name>
		<pin__>N2</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>18</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>1</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>ENET_INT</name>
		<pin__>B21</pin__>
		<i_o_bank>4</i_o_bank>
		<x_coordinate>59</x_coordinate>
		<y_coordinate>36</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>EXT_CLOCK</name>
		<pin__>P26</pin__>
		<i_o_bank>6</i_o_bank>
		<x_coordinate>65</x_coordinate>
		<y_coordinate>19</y_coordinate>
		<cell_number>3</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>IRDA_RXD</name>
		<pin__>AE25</pin__>
		<i_o_bank>6</i_o_bank>
		<x_coordinate>65</x_coordinate>
		<y_coordinate>2</y_coordinate>
		<cell_number>3</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>KEY[0]</name>
		<pin__>G26</pin__>
		<i_o_bank>5</i_o_bank>
		<x_coordinate>65</x_coordinate>
		<y_coordinate>27</y_coordinate>
		<cell_number>1</cell_number>
		<combinational_fan_out>95</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>KEY[1]</name>
		<pin__>N23</pin__>
		<i_o_bank>5</i_o_bank>
		<x_coordinate>65</x_coordinate>
		<y_coordinate>20</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>KEY[2]</name>
		<pin__>P23</pin__>
		<i_o_bank>6</i_o_bank>
		<x_coordinate>65</x_coordinate>
		<y_coordinate>18</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>KEY[3]</name>
		<pin__>W26</pin__>
		<i_o_bank>6</i_o_bank>
		<x_coordinate>65</x_coordinate>
		<y_coordinate>10</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>3</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>OTG_DREQ0</name>
		<pin__>F6</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>33</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>OTG_DREQ1</name>
		<pin__>E5</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>34</y_coordinate>
		<cell_number>4</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>OTG_INT0</name>
		<pin__>B3</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>34</y_coordinate>
		<cell_number>3</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>OTG_INT1</name>
		<pin__>C3</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>33</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>PS2_CLK</name>
		<pin__>D26</pin__>
		<i_o_bank>5</i_o_bank>
		<x_coordinate>65</x_coordinate>
		<y_coordinate>31</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>PS2_DAT</name>
		<pin__>C24</pin__>
		<i_o_bank>5</i_o_bank>
		<x_coordinate>65</x_coordinate>
		<y_coordinate>32</y_coordinate>
		<cell_number>3</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[0]</name>
		<pin__>N25</pin__>
		<i_o_bank>5</i_o_bank>
		<x_coordinate>65</x_coordinate>
		<y_coordinate>19</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[10]</name>
		<pin__>N1</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>18</y_coordinate>
		<cell_number>1</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[11]</name>
		<pin__>P1</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>18</y_coordinate>
		<cell_number>3</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[12]</name>
		<pin__>P2</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>18</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[13]</name>
		<pin__>T7</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>11</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[14]</name>
		<pin__>U3</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>12</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>User</location_assigned_by>
	</row>
	<row>
		<name>SW[15]</name>
		<pin__>U4</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>12</y_coordinate>
		<cell_number>1</cell_number>
		<combinational_fan_out>0</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>