en_dff.txt

用vhdl编写的D触发器

library ieee;
use ieee.std_logic_1164.all;
entity en_dff is
port (d,reset,EN,clk: in std_logic;
      q             : buffer std_logic);
end;
architecture behavior of en_dff is
  begin
   process (reset,clk)
     begin
       if reset='0' then
          q<='0';
       elsif clk'event and clk='1' then
           if EN='1' then
               q<=d;
            else
               q<=q;
            end if;
        end if;
   end process;
end behavior;