compare8.vhd

来自「实现电子密码锁的各项功能,经过编译和仿真」· VHDL 代码 · 共 22 行

library ieee;
use ieee.std_logic_1164.all;
entity compare8 is 
port( q1,q2:in std_logic_vector(7 downto 0);
        test:in std_logic;
        fa:out std_logic;
        fb:out std_logic);
 end compare8;
  architecture three of compare8 is
        begin 
            process(q1,q2)
                 begin
                   if test='1' then
                    if q1=q2 then 
                         fa<='0';fb<='1';
                      else fa<='1';fb<='0';
                     end if;
                     else fa<='0';fb<='0'; 
                   end if;					
            end process; 
          end three;