prev_cmp_total.tan.qmsg

数字显示当前的小时、分钟、秒； 2、可以预置为12小时计时显示和24小时计时显示； 3、一个调节键

{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "5 " "Warning: Found 5 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "SECOND:inst1\|COUT " "Info: Detected ripple clock \"SECOND:inst1\|COUT\" as buffer" {  } { { "second.vhd" "" { Text "J:/ALL/second.vhd" 7 -1 0 } } { "d:/program files/quartusii8.0/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/program files/quartusii8.0/quartus/bin/Assignment Editor.qase" 1 { { 0 "SECOND:inst1\|COUT" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_GATED_CLK" "CLK_CHOOSE:inst2\|Mux0~54 " "Info: Detected gated clock \"CLK_CHOOSE:inst2\|Mux0~54\" as buffer" {  } { { "CLK_CHOOSE.vhd" "" { Text "J:/ALL/CLK_CHOOSE.vhd" 13 -1 0 } } { "d:/program files/quartusii8.0/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/program files/quartusii8.0/quartus/bin/Assignment Editor.qase" 1 { { 0 "CLK_CHOOSE:inst2\|Mux0~54" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_GATED_CLK" "CLK_CHOOSE:inst2\|Mux1~65 " "Info: Detected gated clock \"CLK_CHOOSE:inst2\|Mux1~65\" as buffer" {  } { { "CLK_CHOOSE.vhd" "" { Text "J:/ALL/CLK_CHOOSE.vhd" 13 -1 0 } } { "d:/program files/quartusii8.0/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/program files/quartusii8.0/quartus/bin/Assignment Editor.qase" 1 { { 0 "CLK_CHOOSE:inst2\|Mux1~65" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "MINUTE:inst\|COUT " "Info: Detected ripple clock \"MINUTE:inst\|COUT\" as buffer" {  } { { "MINUTE.vhd" "" { Text "J:/ALL/MINUTE.vhd" 7 -1 0 } } { "d:/program files/quartusii8.0/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/program files/quartusii8.0/quartus/bin/Assignment Editor.qase" 1 { { 0 "MINUTE:inst\|COUT" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_GATED_CLK" "CLK_CHOOSE:inst2\|Mux2~40 " "Info: Detected gated clock \"CLK_CHOOSE:inst2\|Mux2~40\" as buffer" {  } { { "CLK_CHOOSE.vhd" "" { Text "J:/ALL/CLK_CHOOSE.vhd" 13 -1 0 } } { "d:/program files/quartusii8.0/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/program files/quartusii8.0/quartus/bin/Assignment Editor.qase" 1 { { 0 "CLK_CHOOSE:inst2\|Mux2~40" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0 0}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0 "" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLOCK_MAICHONG register HOUR:inst3\|CQI\[3\] register HOUR:inst3\|CQI\[0\] 32.26 MHz 31.0 ns Internal " "Info: Clock \"CLOCK_MAICHONG\" has Internal fmax of 32.26 MHz between source register \"HOUR:inst3\|CQI\[3\]\" and destination register \"HOUR:inst3\|CQI\[0\]\" (period= 31.0 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "12.500 ns + Longest register register " "Info: + Longest register to register delay is 12.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns HOUR:inst3\|CQI\[3\] 1 REG LC2_I19 7 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC2_I19; Fanout = 7; REG Node = 'HOUR:inst3\|CQI\[3\]'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { HOUR:inst3|CQI[3] } "NODE_NAME" } } { "HOUR.vhd" "" { Text "J:/ALL/HOUR.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.100 ns) + CELL(2.200 ns) 3.300 ns HOUR:inst3\|LessThan0~299 2 COMB LC5_I18 1 " "Info: 2: + IC(1.100 ns) + CELL(2.200 ns) = 3.300 ns; Loc. = LC5_I18; Fanout = 1; COMB Node = 'HOUR:inst3\|LessThan0~299'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "3.300 ns" { HOUR:inst3|CQI[3] HOUR:inst3|LessThan0~299 } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1473 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.700 ns) 5.200 ns HOUR:inst3\|LessThan0~300 3 COMB LC7_I18 1 " "Info: 3: + IC(0.200 ns) + CELL(1.700 ns) = 5.200 ns; Loc. = LC7_I18; Fanout = 1; COMB Node = 'HOUR:inst3\|LessThan0~300'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.900 ns" { HOUR:inst3|LessThan0~299 HOUR:inst3|LessThan0~300 } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1473 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.700 ns) 7.100 ns HOUR:inst3\|LessThan0~302 4 COMB LC1_I18 2 " "Info: 4: + IC(0.200 ns) + CELL(1.700 ns) = 7.100 ns; Loc. = LC1_I18; Fanout = 2; COMB Node = 'HOUR:inst3\|LessThan0~302'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.900 ns" { HOUR:inst3|LessThan0~300 HOUR:inst3|LessThan0~302 } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1473 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.100 ns) + CELL(1.700 ns) 9.900 ns HOUR:inst3\|LessThan0~303 5 COMB LC1_I19 7 " "Info: 5: + IC(1.100 ns) + CELL(1.700 ns) = 9.900 ns; Loc. = LC1_I19; Fanout = 7; COMB Node = 'HOUR:inst3\|LessThan0~303'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.800 ns" { HOUR:inst3|LessThan0~302 HOUR:inst3|LessThan0~303 } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1473 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.100 ns) + CELL(1.500 ns) 12.500 ns HOUR:inst3\|CQI\[0\] 6 REG LC1_I20 7 " "Info: 6: + IC(1.100 ns) + CELL(1.500 ns) = 12.500 ns; Loc. = LC1_I20; Fanout = 7; REG Node = 'HOUR:inst3\|CQI\[0\]'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.600 ns" { HOUR:inst3|LessThan0~303 HOUR:inst3|CQI[0] } "NODE_NAME" } } { "HOUR.vhd" "" { Text "J:/ALL/HOUR.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.800 ns ( 70.40 % ) " "Info: Total cell delay = 8.800 ns ( 70.40 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.700 ns ( 29.60 % ) " "Info: Total interconnect delay = 3.700 ns ( 29.60 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "12.500 ns" { HOUR:inst3|CQI[3] HOUR:inst3|LessThan0~299 HOUR:inst3|LessThan0~300 HOUR:inst3|LessThan0~302 HOUR:inst3|LessThan0~303 HOUR:inst3|CQI[0] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "12.500 ns" { HOUR:inst3|CQI[3] {} HOUR:inst3|LessThan0~299 {} HOUR:inst3|LessThan0~300 {} HOUR:inst3|LessThan0~302 {} HOUR:inst3|LessThan0~303 {} HOUR:inst3|CQI[0] {} } { 0.000ns 1.100ns 0.200ns 0.200ns 1.100ns 1.100ns } { 0.000ns 2.200ns 1.700ns 1.700ns 1.700ns 1.500ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-16.700 ns - Smallest " "Info: - Smallest clock skew is -16.700 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_MAICHONG destination 8.500 ns + Shortest register " "Info: + Shortest clock path from clock \"CLOCK_MAICHONG\" to destination register is 8.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns CLOCK_MAICHONG 1 CLK PIN_80 3 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = PIN_80; Fanout = 3; CLK Node = 'CLOCK_MAICHONG'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_MAICHONG } "NODE_NAME" } } { "TOTAL.bdf" "" { Schematic "J:/ALL/TOTAL.bdf" { { 192 -168 24 208 "CLOCK_MAICHONG" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(1.700 ns) 3.600 ns CLK_CHOOSE:inst2\|Mux2~40 2 COMB LC1_H3 8 " "Info: 2: + IC(1.400 ns) + CELL(1.700 ns) = 3.600 ns; Loc. = LC1_H3; Fanout = 8; COMB Node = 'CLK_CHOOSE:inst2\|Mux2~40'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "3.100 ns" { CLOCK_MAICHONG CLK_CHOOSE:inst2|Mux2~40 } "NODE_NAME" } } { "CLK_CHOOSE.vhd" "" { Text "J:/ALL/CLK_CHOOSE.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.900 ns) + CELL(0.000 ns) 8.500 ns HOUR:inst3\|CQI\[0\] 3 REG LC1_I20 7 " "Info: 3: + IC(4.900 ns) + CELL(0.000 ns) = 8.500 ns; Loc. = LC1_I20; Fanout = 7; REG Node = 'HOUR:inst3\|CQI\[0\]'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "4.900 ns" { CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[0] } "NODE_NAME" } } { "HOUR.vhd" "" { Text "J:/ALL/HOUR.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.200 ns ( 25.88 % ) " "Info: Total cell delay = 2.200 ns ( 25.88 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.300 ns ( 74.12 % ) " "Info: Total interconnect delay = 6.300 ns ( 74.12 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "8.500 ns" { CLOCK_MAICHONG CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[0] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "8.500 ns" { CLOCK_MAICHONG {} CLOCK_MAICHONG~out {} CLK_CHOOSE:inst2|Mux2~40 {} HOUR:inst3|CQI[0] {} } { 0.000ns 0.000ns 1.400ns 4.900ns } { 0.000ns 0.500ns 1.700ns 0.000ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK_MAICHONG source 25.200 ns - Longest register " "Info: - Longest clock path from clock \"CLOCK_MAICHONG\" to source register is 25.200 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns CLOCK_MAICHONG 1 CLK PIN_80 3 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = PIN_80; Fanout = 3; CLK Node = 'CLOCK_MAICHONG'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK_MAICHONG } "NODE_NAME" } } { "TOTAL.bdf" "" { Schematic "J:/ALL/TOTAL.bdf" { { 192 -168 24 208 "CLOCK_MAICHONG" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(1.700 ns) 3.600 ns CLK_CHOOSE:inst2\|Mux0~54 2 COMB LC4_H3 8 " "Info: 2: + IC(1.400 ns) + CELL(1.700 ns) = 3.600 ns; Loc. = LC4_H3; Fanout = 8; COMB Node = 'CLK_CHOOSE:inst2\|Mux0~54'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "3.100 ns" { CLOCK_MAICHONG CLK_CHOOSE:inst2|Mux0~54 } "NODE_NAME" } } { "CLK_CHOOSE.vhd" "" { Text "J:/ALL/CLK_CHOOSE.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.700 ns) + CELL(1.100 ns) 8.400 ns SECOND:inst1\|COUT 3 REG LC4_J4 2 " "Info: 3: + IC(3.700 ns) + CELL(1.100 ns) = 8.400 ns; Loc. = LC4_J4; Fanout = 2; REG Node = 'SECOND:inst1\|COUT'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "4.800 ns" { CLK_CHOOSE:inst2|Mux0~54 SECOND:inst1|COUT } "NODE_NAME" } } { "second.vhd" "" { Text "J:/ALL/second.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.900 ns) + CELL(1.900 ns) 13.200 ns CLK_CHOOSE:inst2\|Mux1~65 4 COMB LC3_H3 8 " "Info: 4: + IC(2.900 ns) + CELL(1.900 ns) = 13.200 ns; Loc. = LC3_H3; Fanout = 8; COMB Node = 'CLK_CHOOSE:inst2\|Mux1~65'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "4.800 ns" { SECOND:inst1|COUT CLK_CHOOSE:inst2|Mux1~65 } "NODE_NAME" } } { "CLK_CHOOSE.vhd" "" { Text "J:/ALL/CLK_CHOOSE.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(1.100 ns) 16.300 ns MINUTE:inst\|COUT 5 REG LC5_H8 2 " "Info: 5: + IC(2.000 ns) + CELL(1.100 ns) = 16.300 ns; Loc. = LC5_H8; Fanout = 2; REG Node = 'MINUTE:inst\|COUT'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "3.100 ns" { CLK_CHOOSE:inst2|Mux1~65 MINUTE:inst|COUT } "NODE_NAME" } } { "MINUTE.vhd" "" { Text "J:/ALL/MINUTE.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.800 ns) + CELL(2.200 ns) 20.300 ns CLK_CHOOSE:inst2\|Mux2~40 6 COMB LC1_H3 8 " "Info: 6: + IC(1.800 ns) + CELL(2.200 ns) = 20.300 ns; Loc. = LC1_H3; Fanout = 8; COMB Node = 'CLK_CHOOSE:inst2\|Mux2~40'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "4.000 ns" { MINUTE:inst|COUT CLK_CHOOSE:inst2|Mux2~40 } "NODE_NAME" } } { "CLK_CHOOSE.vhd" "" { Text "J:/ALL/CLK_CHOOSE.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.900 ns) + CELL(0.000 ns) 25.200 ns HOUR:inst3\|CQI\[3\] 7 REG LC2_I19 7 " "Info: 7: + IC(4.900 ns) + CELL(0.000 ns) = 25.200 ns; Loc. = LC2_I19; Fanout = 7; REG Node = 'HOUR:inst3\|CQI\[3\]'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "4.900 ns" { CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[3] } "NODE_NAME" } } { "HOUR.vhd" "" { Text "J:/ALL/HOUR.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.500 ns ( 33.73 % ) " "Info: Total cell delay = 8.500 ns ( 33.73 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "16.700 ns ( 66.27 % ) " "Info: Total interconnect delay = 16.700 ns ( 66.27 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "25.200 ns" { CLOCK_MAICHONG CLK_CHOOSE:inst2|Mux0~54 SECOND:inst1|COUT CLK_CHOOSE:inst2|Mux1~65 MINUTE:inst|COUT CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[3] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "25.200 ns" { CLOCK_MAICHONG {} CLOCK_MAICHONG~out {} CLK_CHOOSE:inst2|Mux0~54 {} SECOND:inst1|COUT {} CLK_CHOOSE:inst2|Mux1~65 {} MINUTE:inst|COUT {} CLK_CHOOSE:inst2|Mux2~40 {} HOUR:inst3|CQI[3] {} } { 0.000ns 0.000ns 1.400ns 3.700ns 2.900ns 2.000ns 1.800ns 4.900ns } { 0.000ns 0.500ns 1.700ns 1.100ns 1.900ns 1.100ns 2.200ns 0.000ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 0}  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "8.500 ns" { CLOCK_MAICHONG CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[0] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "8.500 ns" { CLOCK_MAICHONG {} CLOCK_MAICHONG~out {} CLK_CHOOSE:inst2|Mux2~40 {} HOUR:inst3|CQI[0] {} } { 0.000ns 0.000ns 1.400ns 4.900ns } { 0.000ns 0.500ns 1.700ns 0.000ns } "" } } { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "25.200 ns" { CLOCK_MAICHONG CLK_CHOOSE:inst2|Mux0~54 SECOND:inst1|COUT CLK_CHOOSE:inst2|Mux1~65 MINUTE:inst|COUT CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[3] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "25.200 ns" { CLOCK_MAICHONG {} CLOCK_MAICHONG~out {} CLK_CHOOSE:inst2|Mux0~54 {} SECOND:inst1|COUT {} CLK_CHOOSE:inst2|Mux1~65 {} MINUTE:inst|COUT {} CLK_CHOOSE:inst2|Mux2~40 {} HOUR:inst3|CQI[3] {} } { 0.000ns 0.000ns 1.400ns 3.700ns 2.900ns 2.000ns 1.800ns 4.900ns } { 0.000ns 0.500ns 1.700ns 1.100ns 1.900ns 1.100ns 2.200ns 0.000ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.100 ns + " "Info: + Micro clock to output delay of source is 1.100 ns" {  } { { "HOUR.vhd" "" { Text "J:/ALL/HOUR.vhd" 15 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.700 ns + " "Info: + Micro setup delay of destination is 0.700 ns" {  } { { "HOUR.vhd" "" { Text "J:/ALL/HOUR.vhd" 15 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0 0}  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "12.500 ns" { HOUR:inst3|CQI[3] HOUR:inst3|LessThan0~299 HOUR:inst3|LessThan0~300 HOUR:inst3|LessThan0~302 HOUR:inst3|LessThan0~303 HOUR:inst3|CQI[0] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "12.500 ns" { HOUR:inst3|CQI[3] {} HOUR:inst3|LessThan0~299 {} HOUR:inst3|LessThan0~300 {} HOUR:inst3|LessThan0~302 {} HOUR:inst3|LessThan0~303 {} HOUR:inst3|CQI[0] {} } { 0.000ns 1.100ns 0.200ns 0.200ns 1.100ns 1.100ns } { 0.000ns 2.200ns 1.700ns 1.700ns 1.700ns 1.500ns } "" } } { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "8.500 ns" { CLOCK_MAICHONG CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[0] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "8.500 ns" { CLOCK_MAICHONG {} CLOCK_MAICHONG~out {} CLK_CHOOSE:inst2|Mux2~40 {} HOUR:inst3|CQI[0] {} } { 0.000ns 0.000ns 1.400ns 4.900ns } { 0.000ns 0.500ns 1.700ns 0.000ns } "" } } { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "25.200 ns" { CLOCK_MAICHONG CLK_CHOOSE:inst2|Mux0~54 SECOND:inst1|COUT CLK_CHOOSE:inst2|Mux1~65 MINUTE:inst|COUT CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[3] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "25.200 ns" { CLOCK_MAICHONG {} CLOCK_MAICHONG~out {} CLK_CHOOSE:inst2|Mux0~54 {} SECOND:inst1|COUT {} CLK_CHOOSE:inst2|Mux1~65 {} MINUTE:inst|COUT {} CLK_CHOOSE:inst2|Mux2~40 {} HOUR:inst3|CQI[3] {} } { 0.000ns 0.000ns 1.400ns 3.700ns 2.900ns 2.000ns 1.800ns 4.900ns } { 0.000ns 0.500ns 1.700ns 1.100ns 1.900ns 1.100ns 2.200ns 0.000ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "SET_TIME\[1\] register HOUR:inst3\|CQI\[3\] register HOUR:inst3\|CQI\[0\] 31.95 MHz 31.3 ns Internal " "Info: Clock \"SET_TIME\[1\]\" has Internal fmax of 31.95 MHz between source register \"HOUR:inst3\|CQI\[3\]\" and destination register \"HOUR:inst3\|CQI\[0\]\" (period= 31.3 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "12.500 ns + Longest register register " "Info: + Longest register to register delay is 12.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns HOUR:inst3\|CQI\[3\] 1 REG LC2_I19 7 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC2_I19; Fanout = 7; REG Node = 'HOUR:inst3\|CQI\[3\]'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { HOUR:inst3|CQI[3] } "NODE_NAME" } } { "HOUR.vhd" "" { Text "J:/ALL/HOUR.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.100 ns) + CELL(2.200 ns) 3.300 ns HOUR:inst3\|LessThan0~299 2 COMB LC5_I18 1 " "Info: 2: + IC(1.100 ns) + CELL(2.200 ns) = 3.300 ns; Loc. = LC5_I18; Fanout = 1; COMB Node = 'HOUR:inst3\|LessThan0~299'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "3.300 ns" { HOUR:inst3|CQI[3] HOUR:inst3|LessThan0~299 } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1473 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.700 ns) 5.200 ns HOUR:inst3\|LessThan0~300 3 COMB LC7_I18 1 " "Info: 3: + IC(0.200 ns) + CELL(1.700 ns) = 5.200 ns; Loc. = LC7_I18; Fanout = 1; COMB Node = 'HOUR:inst3\|LessThan0~300'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.900 ns" { HOUR:inst3|LessThan0~299 HOUR:inst3|LessThan0~300 } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1473 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.700 ns) 7.100 ns HOUR:inst3\|LessThan0~302 4 COMB LC1_I18 2 " "Info: 4: + IC(0.200 ns) + CELL(1.700 ns) = 7.100 ns; Loc. = LC1_I18; Fanout = 2; COMB Node = 'HOUR:inst3\|LessThan0~302'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.900 ns" { HOUR:inst3|LessThan0~300 HOUR:inst3|LessThan0~302 } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1473 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.100 ns) + CELL(1.700 ns) 9.900 ns HOUR:inst3\|LessThan0~303 5 COMB LC1_I19 7 " "Info: 5: + IC(1.100 ns) + CELL(1.700 ns) = 9.900 ns; Loc. = LC1_I19; Fanout = 7; COMB Node = 'HOUR:inst3\|LessThan0~303'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.800 ns" { HOUR:inst3|LessThan0~302 HOUR:inst3|LessThan0~303 } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/program files/quartusii8.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1473 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.100 ns) + CELL(1.500 ns) 12.500 ns HOUR:inst3\|CQI\[0\] 6 REG LC1_I20 7 " "Info: 6: + IC(1.100 ns) + CELL(1.500 ns) = 12.500 ns; Loc. = LC1_I20; Fanout = 7; REG Node = 'HOUR:inst3\|CQI\[0\]'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.600 ns" { HOUR:inst3|LessThan0~303 HOUR:inst3|CQI[0] } "NODE_NAME" } } { "HOUR.vhd" "" { Text "J:/ALL/HOUR.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.800 ns ( 70.40 % ) " "Info: Total cell delay = 8.800 ns ( 70.40 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.700 ns ( 29.60 % ) " "Info: Total interconnect delay = 3.700 ns ( 29.60 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "12.500 ns" { HOUR:inst3|CQI[3] HOUR:inst3|LessThan0~299 HOUR:inst3|LessThan0~300 HOUR:inst3|LessThan0~302 HOUR:inst3|LessThan0~303 HOUR:inst3|CQI[0] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "12.500 ns" { HOUR:inst3|CQI[3] {} HOUR:inst3|LessThan0~299 {} HOUR:inst3|LessThan0~300 {} HOUR:inst3|LessThan0~302 {} HOUR:inst3|LessThan0~303 {} HOUR:inst3|CQI[0] {} } { 0.000ns 1.100ns 0.200ns 0.200ns 1.100ns 1.100ns } { 0.000ns 2.200ns 1.700ns 1.700ns 1.700ns 1.500ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-17.000 ns - Smallest " "Info: - Smallest clock skew is -17.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "SET_TIME\[1\] destination 8.700 ns + Shortest register " "Info: + Shortest clock path from clock \"SET_TIME\[1\]\" to destination register is 8.700 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns SET_TIME\[1\] 1 CLK PIN_183 3 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = PIN_183; Fanout = 3; CLK Node = 'SET_TIME\[1\]'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { SET_TIME[1] } "NODE_NAME" } } { "TOTAL.bdf" "" { Schematic "J:/ALL/TOTAL.bdf" { { 128 -168 0 144 "SET_TIME\[1..0\]" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(1.900 ns) 3.800 ns CLK_CHOOSE:inst2\|Mux2~40 2 COMB LC1_H3 8 " "Info: 2: + IC(1.400 ns) + CELL(1.900 ns) = 3.800 ns; Loc. = LC1_H3; Fanout = 8; COMB Node = 'CLK_CHOOSE:inst2\|Mux2~40'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "3.300 ns" { SET_TIME[1] CLK_CHOOSE:inst2|Mux2~40 } "NODE_NAME" } } { "CLK_CHOOSE.vhd" "" { Text "J:/ALL/CLK_CHOOSE.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.900 ns) + CELL(0.000 ns) 8.700 ns HOUR:inst3\|CQI\[0\] 3 REG LC1_I20 7 " "Info: 3: + IC(4.900 ns) + CELL(0.000 ns) = 8.700 ns; Loc. = LC1_I20; Fanout = 7; REG Node = 'HOUR:inst3\|CQI\[0\]'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "4.900 ns" { CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[0] } "NODE_NAME" } } { "HOUR.vhd" "" { Text "J:/ALL/HOUR.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.400 ns ( 27.59 % ) " "Info: Total cell delay = 2.400 ns ( 27.59 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.300 ns ( 72.41 % ) " "Info: Total interconnect delay = 6.300 ns ( 72.41 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "8.700 ns" { SET_TIME[1] CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[0] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "8.700 ns" { SET_TIME[1] {} SET_TIME[1]~out {} CLK_CHOOSE:inst2|Mux2~40 {} HOUR:inst3|CQI[0] {} } { 0.000ns 0.000ns 1.400ns 4.900ns } { 0.000ns 0.500ns 1.900ns 0.000ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "SET_TIME\[1\] source 25.700 ns - Longest register " "Info: - Longest clock path from clock \"SET_TIME\[1\]\" to source register is 25.700 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns SET_TIME\[1\] 1 CLK PIN_183 3 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = PIN_183; Fanout = 3; CLK Node = 'SET_TIME\[1\]'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { SET_TIME[1] } "NODE_NAME" } } { "TOTAL.bdf" "" { Schematic "J:/ALL/TOTAL.bdf" { { 128 -168 0 144 "SET_TIME\[1..0\]" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(2.200 ns) 4.100 ns CLK_CHOOSE:inst2\|Mux0~54 2 COMB LC4_H3 8 " "Info: 2: + IC(1.400 ns) + CELL(2.200 ns) = 4.100 ns; Loc. = LC4_H3; Fanout = 8; COMB Node = 'CLK_CHOOSE:inst2\|Mux0~54'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "3.600 ns" { SET_TIME[1] CLK_CHOOSE:inst2|Mux0~54 } "NODE_NAME" } } { "CLK_CHOOSE.vhd" "" { Text "J:/ALL/CLK_CHOOSE.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.700 ns) + CELL(1.100 ns) 8.900 ns SECOND:inst1\|COUT 3 REG LC4_J4 2 " "Info: 3: + IC(3.700 ns) + CELL(1.100 ns) = 8.900 ns; Loc. = LC4_J4; Fanout = 2; REG Node = 'SECOND:inst1\|COUT'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "4.800 ns" { CLK_CHOOSE:inst2|Mux0~54 SECOND:inst1|COUT } "NODE_NAME" } } { "second.vhd" "" { Text "J:/ALL/second.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.900 ns) + CELL(1.900 ns) 13.700 ns CLK_CHOOSE:inst2\|Mux1~65 4 COMB LC3_H3 8 " "Info: 4: + IC(2.900 ns) + CELL(1.900 ns) = 13.700 ns; Loc. = LC3_H3; Fanout = 8; COMB Node = 'CLK_CHOOSE:inst2\|Mux1~65'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "4.800 ns" { SECOND:inst1|COUT CLK_CHOOSE:inst2|Mux1~65 } "NODE_NAME" } } { "CLK_CHOOSE.vhd" "" { Text "J:/ALL/CLK_CHOOSE.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(1.100 ns) 16.800 ns MINUTE:inst\|COUT 5 REG LC5_H8 2 " "Info: 5: + IC(2.000 ns) + CELL(1.100 ns) = 16.800 ns; Loc. = LC5_H8; Fanout = 2; REG Node = 'MINUTE:inst\|COUT'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "3.100 ns" { CLK_CHOOSE:inst2|Mux1~65 MINUTE:inst|COUT } "NODE_NAME" } } { "MINUTE.vhd" "" { Text "J:/ALL/MINUTE.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.800 ns) + CELL(2.200 ns) 20.800 ns CLK_CHOOSE:inst2\|Mux2~40 6 COMB LC1_H3 8 " "Info: 6: + IC(1.800 ns) + CELL(2.200 ns) = 20.800 ns; Loc. = LC1_H3; Fanout = 8; COMB Node = 'CLK_CHOOSE:inst2\|Mux2~40'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "4.000 ns" { MINUTE:inst|COUT CLK_CHOOSE:inst2|Mux2~40 } "NODE_NAME" } } { "CLK_CHOOSE.vhd" "" { Text "J:/ALL/CLK_CHOOSE.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.900 ns) + CELL(0.000 ns) 25.700 ns HOUR:inst3\|CQI\[3\] 7 REG LC2_I19 7 " "Info: 7: + IC(4.900 ns) + CELL(0.000 ns) = 25.700 ns; Loc. = LC2_I19; Fanout = 7; REG Node = 'HOUR:inst3\|CQI\[3\]'" {  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "4.900 ns" { CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[3] } "NODE_NAME" } } { "HOUR.vhd" "" { Text "J:/ALL/HOUR.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "9.000 ns ( 35.02 % ) " "Info: Total cell delay = 9.000 ns ( 35.02 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "16.700 ns ( 64.98 % ) " "Info: Total interconnect delay = 16.700 ns ( 64.98 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "25.700 ns" { SET_TIME[1] CLK_CHOOSE:inst2|Mux0~54 SECOND:inst1|COUT CLK_CHOOSE:inst2|Mux1~65 MINUTE:inst|COUT CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[3] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "25.700 ns" { SET_TIME[1] {} SET_TIME[1]~out {} CLK_CHOOSE:inst2|Mux0~54 {} SECOND:inst1|COUT {} CLK_CHOOSE:inst2|Mux1~65 {} MINUTE:inst|COUT {} CLK_CHOOSE:inst2|Mux2~40 {} HOUR:inst3|CQI[3] {} } { 0.000ns 0.000ns 1.400ns 3.700ns 2.900ns 2.000ns 1.800ns 4.900ns } { 0.000ns 0.500ns 2.200ns 1.100ns 1.900ns 1.100ns 2.200ns 0.000ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 0}  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "8.700 ns" { SET_TIME[1] CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[0] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "8.700 ns" { SET_TIME[1] {} SET_TIME[1]~out {} CLK_CHOOSE:inst2|Mux2~40 {} HOUR:inst3|CQI[0] {} } { 0.000ns 0.000ns 1.400ns 4.900ns } { 0.000ns 0.500ns 1.900ns 0.000ns } "" } } { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "25.700 ns" { SET_TIME[1] CLK_CHOOSE:inst2|Mux0~54 SECOND:inst1|COUT CLK_CHOOSE:inst2|Mux1~65 MINUTE:inst|COUT CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[3] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "25.700 ns" { SET_TIME[1] {} SET_TIME[1]~out {} CLK_CHOOSE:inst2|Mux0~54 {} SECOND:inst1|COUT {} CLK_CHOOSE:inst2|Mux1~65 {} MINUTE:inst|COUT {} CLK_CHOOSE:inst2|Mux2~40 {} HOUR:inst3|CQI[3] {} } { 0.000ns 0.000ns 1.400ns 3.700ns 2.900ns 2.000ns 1.800ns 4.900ns } { 0.000ns 0.500ns 2.200ns 1.100ns 1.900ns 1.100ns 2.200ns 0.000ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.100 ns + " "Info: + Micro clock to output delay of source is 1.100 ns" {  } { { "HOUR.vhd" "" { Text "J:/ALL/HOUR.vhd" 15 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.700 ns + " "Info: + Micro setup delay of destination is 0.700 ns" {  } { { "HOUR.vhd" "" { Text "J:/ALL/HOUR.vhd" 15 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0 0}  } { { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "12.500 ns" { HOUR:inst3|CQI[3] HOUR:inst3|LessThan0~299 HOUR:inst3|LessThan0~300 HOUR:inst3|LessThan0~302 HOUR:inst3|LessThan0~303 HOUR:inst3|CQI[0] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "12.500 ns" { HOUR:inst3|CQI[3] {} HOUR:inst3|LessThan0~299 {} HOUR:inst3|LessThan0~300 {} HOUR:inst3|LessThan0~302 {} HOUR:inst3|LessThan0~303 {} HOUR:inst3|CQI[0] {} } { 0.000ns 1.100ns 0.200ns 0.200ns 1.100ns 1.100ns } { 0.000ns 2.200ns 1.700ns 1.700ns 1.700ns 1.500ns } "" } } { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "8.700 ns" { SET_TIME[1] CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[0] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "8.700 ns" { SET_TIME[1] {} SET_TIME[1]~out {} CLK_CHOOSE:inst2|Mux2~40 {} HOUR:inst3|CQI[0] {} } { 0.000ns 0.000ns 1.400ns 4.900ns } { 0.000ns 0.500ns 1.900ns 0.000ns } "" } } { "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartusii8.0/quartus/bin/TimingClosureFloorplan.fld" "" "25.700 ns" { SET_TIME[1] CLK_CHOOSE:inst2|Mux0~54 SECOND:inst1|COUT CLK_CHOOSE:inst2|Mux1~65 MINUTE:inst|COUT CLK_CHOOSE:inst2|Mux2~40 HOUR:inst3|CQI[3] } "NODE_NAME" } } { "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/quartusii8.0/quartus/bin/Technology_Viewer.qrui" "25.700 ns" { SET_TIME[1] {} SET_TIME[1]~out {} CLK_CHOOSE:inst2|Mux0~54 {} SECOND:inst1|COUT {} CLK_CHOOSE:inst2|Mux1~65 {} MINUTE:inst|COUT {} CLK_CHOOSE:inst2|Mux2~40 {} HOUR:inst3|CQI[3] {} } { 0.000ns 0.000ns 1.400ns 3.700ns 2.900ns 2.000ns 1.800ns 4.900ns } { 0.000ns 0.500ns 2.200ns 1.100ns 1.900ns 1.100ns 2.200ns 0.000ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0 0}