debounce.map.qmsg

基于VHDL的键盘去抖动电路 基于VHDL的键盘去抖动电路

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version " "Info: Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Nov 08 12:27:26 2008 " "Info: Processing started: Sat Nov 08 12:27:26 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off debounce -c debounce " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off debounce -c debounce" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "debounce.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file debounce.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 debounce-arch " "Info: Found design unit 1: debounce-arch" {  } { { "debounce.vhd" "" { Text "D:/CPLD/bitch/debounce.vhd" 13 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 debounce " "Info: Found entity 1: debounce" {  } { { "debounce.vhd" "" { Text "D:/CPLD/bitch/debounce.vhd" 7 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "debounce " "Info: Elaborating entity \"debounce\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "clr debounce.vhd(25) " "Warning (10492): VHDL Process Statement warning at debounce.vhd(25): signal \"clr\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "debounce.vhd" "" { Text "D:/CPLD/bitch/debounce.vhd" 25 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "q debounce.vhd(32) " "Warning (10492): VHDL Process Statement warning at debounce.vhd(32): signal \"q\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "debounce.vhd" "" { Text "D:/CPLD/bitch/debounce.vhd" 32 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "delay debounce.vhd(32) " "Warning (10492): VHDL Process Statement warning at debounce.vhd(32): signal \"delay\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "debounce.vhd" "" { Text "D:/CPLD/bitch/debounce.vhd" 32 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "clr debounce.vhd(45) " "Warning (10492): VHDL Process Statement warning at debounce.vhd(45): signal \"clr\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "debounce.vhd" "" { Text "D:/CPLD/bitch/debounce.vhd" 45 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "clr debounce.vhd(59) " "Warning (10492): VHDL Process Statement warning at debounce.vhd(59): signal \"clr\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "debounce.vhd" "" { Text "D:/CPLD/bitch/debounce.vhd" 59 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "q1 debounce.vhd(66) " "Warning (10492): VHDL Process Statement warning at debounce.vhd(66): signal \"q1\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "debounce.vhd" "" { Text "D:/CPLD/bitch/debounce.vhd" 66 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "q2 debounce.vhd(66) " "Warning (10492): VHDL Process Statement warning at debounce.vhd(66): signal \"q2\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "debounce.vhd" "" { Text "D:/CPLD/bitch/debounce.vhd" 66 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "17 " "Info: Implemented 17 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "3 " "Info: Implemented 3 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "1 " "Info: Implemented 1 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "13 " "Info: Implemented 13 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 7 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 7 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "164 " "Info: Allocated 164 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Sat Nov 08 12:27:29 2008 " "Info: Processing ended: Sat Nov 08 12:27:29 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}