📄 lcd_283rb06.map.qmsg
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{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[1\]\[11\] data_in GND " "Warning: Reduced register \"data\[1\]\[11\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[1\]\[12\] data_in GND " "Warning: Reduced register \"data\[1\]\[12\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[1\]\[13\] data_in GND " "Warning: Reduced register \"data\[1\]\[13\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[1\]\[14\] data_in GND " "Warning: Reduced register \"data\[1\]\[14\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[1\]\[15\] data_in GND " "Warning: Reduced register \"data\[1\]\[15\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "data\[2\]\[0\] High " "Info: Power-up level of register \"data\[2\]\[0\]\" is not specified -- using power-up level of High to minimize register" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[0\] data_in VCC " "Warning: Reduced register \"data\[2\]\[0\]\" with stuck data_in port to stuck value VCC" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[1\] data_in GND " "Warning: Reduced register \"data\[2\]\[1\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[2\] data_in GND " "Warning: Reduced register \"data\[2\]\[2\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[3\] data_in GND " "Warning: Reduced register \"data\[2\]\[3\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "data\[2\]\[4\] High " "Info: Power-up level of register \"data\[2\]\[4\]\" is not specified -- using power-up level of High to minimize register" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[4\] data_in VCC " "Warning: Reduced register \"data\[2\]\[4\]\" with stuck data_in port to stuck value VCC" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "data\[2\]\[5\] High " "Info: Power-up level of register \"data\[2\]\[5\]\" is not specified -- using power-up level of High to minimize register" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[5\] data_in VCC " "Warning: Reduced register \"data\[2\]\[5\]\" with stuck data_in port to stuck value VCC" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[6\] data_in GND " "Warning: Reduced register \"data\[2\]\[6\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[7\] data_in GND " "Warning: Reduced register \"data\[2\]\[7\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[8\] data_in GND " "Warning: Reduced register \"data\[2\]\[8\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "data\[2\]\[9\] High " "Info: Power-up level of register \"data\[2\]\[9\]\" is not specified -- using power-up level of High to minimize register" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[9\] data_in VCC " "Warning: Reduced register \"data\[2\]\[9\]\" with stuck data_in port to stuck value VCC" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[10\] data_in GND " "Warning: Reduced register \"data\[2\]\[10\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[11\] data_in GND " "Warning: Reduced register \"data\[2\]\[11\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "data\[2\]\[12\] High " "Info: Power-up level of register \"data\[2\]\[12\]\" is not specified -- using power-up level of High to minimize register" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[12\] data_in VCC " "Warning: Reduced register \"data\[2\]\[12\]\" with stuck data_in port to stuck value VCC" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[13\] data_in GND " "Warning: Reduced register \"data\[2\]\[13\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[14\] data_in GND " "Warning: Reduced register \"data\[2\]\[14\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[2\]\[15\] data_in GND " "Warning: Reduced register \"data\[2\]\[15\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "data\[3\]\[0\] High " "Info: Power-up level of register \"data\[3\]\[0\]\" is not specified -- using power-up level of High to minimize register" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[3\]\[0\] data_in VCC " "Warning: Reduced register \"data\[3\]\[0\]\" with stuck data_in port to stuck value VCC" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[3\]\[1\] data_in GND " "Warning: Reduced register \"data\[3\]\[1\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[3\]\[2\] data_in GND " "Warning: Reduced register \"data\[3\]\[2\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[3\]\[3\] data_in GND " "Warning: Reduced register \"data\[3\]\[3\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[3\]\[4\] data_in GND " "Warning: Reduced register \"data\[3\]\[4\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/2.83RD05_FPGA/lcd_init.v" 114 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data\[3\]\[5\] data_in GND " "Warning: Reduced register \"data\[3\]\[5\]\" with stuck data_in port to stuck value GND" { } { { "lcd_init.v" "" { Text "D:/2.83/new edition fpga rgb/
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