ep2c5q208.fit.talkback.xml

几个SPI

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This XML file (created on Fri Dec 07 16:15:03 2007) contains limited information
from the compilation of logic designs using Quartus II software (BUT NOT THE
LOGIC DESIGN FILES) that will be transmitted to Altera Corporation through
operation of the "TalkBack" feature.  To enable/disable this feature, run
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<talkback>
<ver>5.1</ver>
<schema>quartus_version_5.1_build_176.xsd</schema><license>
	<host_id>000fb0ef7b17</host_id>
	<nic_id>000fb0ef7b17</nic_id>
	<cdrive_id>0c8dfb10</cdrive_id>
</license>
<tool>
	<name>Quartus II</name>
	<version>5.1</version>
	<build>Build 176</build>
	<binary_type>32</binary_type>
	<module>quartus_fit.exe</module>
	<edition>Full Version</edition>
	<compilation_end_time>Fri Dec 07 16:15:04 2007</compilation_end_time>
</tool>
<machine>
	<os>Windows XP</os>
	<cpu>
		<proc_count>1</proc_count>
		<cpu_freq units="MHz">1862</cpu_freq>
	</cpu>
	<ram units="MB">512</ram>
</machine>
<top_file>G:/My File/File/study/FPGA/Procedure/EP2C5Q208/EP2C5Q208</top_file>
<resource_usage_summary>
	<rsc name="Total logic elements" util="34" max=" 4608 " type="int">1566 </rsc>
	<rsc name="-- Combinational with no register" type="int">1158</rsc>
	<rsc name="-- Register only" type="int">0</rsc>
	<rsc name="-- Combinational with a register" type="int">408</rsc>
	<rsc name="Logic element usage by number of LUT inputs" type="text"></rsc>
	<rsc name="-- 4 input functions" type="int">819</rsc>
	<rsc name="-- 3 input functions" type="int">383</rsc>
	<rsc name="-- &lt;=2 input functions" type="int">364</rsc>
	<rsc name="-- Register only" type="int">0</rsc>
	<rsc name="-- Combinational cells for routing" type="int">0</rsc>
	<rsc name="Logic elements by mode" type="text"></rsc>
	<rsc name="-- normal mode" type="int">1397</rsc>
	<rsc name="-- arithmetic mode" type="int">169</rsc>
	<rsc name="Total registers" util="9" max=" 4608 " type="int">408 </rsc>
	<rsc name="Total LABs" util="41" max=" 288 " type="int">118 </rsc>
	<rsc name="User inserted logic elements" type="int">0</rsc>
	<rsc name="Virtual pins" type="int">0</rsc>
	<rsc name="I/O pins" util="56" max=" 142 " type="int">79 </rsc>
	<rsc name="-- Clock pins" util="100" max=" 4 " type="int">4 </rsc>
	<rsc name="Global signals" type="int">8</rsc>
	<rsc name="M4Ks" util="4" max=" 26 " type="int">1 </rsc>
	<rsc name="Total memory bits" util="1" max=" 119808 " type="int">1280 </rsc>
	<rsc name="Total RAM block bits" util="4" max=" 119808 " type="int">4608 </rsc>
	<rsc name="Embedded Multiplier 9-bit elements" util="0" max=" 26 " type="int">0 </rsc>
	<rsc name="PLLs" util="0" max=" 2 " type="int">0 </rsc>
	<rsc name="Global clocks" util="100" max=" 8 " type="int">8 </rsc>
	<rsc name="Maximum fan-out node" type="text">RESET</rsc>
	<rsc name="Maximum fan-out" type="int">332</rsc>
	<rsc name="Highest non-global fan-out signal" type="text">RESET</rsc>
	<rsc name="Highest non-global fan-out" type="int">332</rsc>
	<rsc name="Total fan-out" type="int">6497</rsc>
	<rsc name="Average fan-out" type="float">3.15</rsc>
</resource_usage_summary>
<control_signals>
	<row>
		<name>VGA:inst10|HsyncB</name>
		<location>LCFF_X19_Y1_N7</location>
		<fan_out>12</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>LCD1602:inst2|ClkInt</name>
		<location>LCFF_X15_Y6_N17</location>
		<fan_out>17</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>Frequency:inst|\CLK1uS:Count1[8]</name>
		<location>LCFF_X12_Y8_N27</location>
		<fan_out>4</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>Frequency:inst|VGACLK</name>
		<location>LCFF_X19_Y1_N9</location>
		<fan_out>13</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>Frequency:inst|\CLK1uS:Count2[7]</name>
		<location>LCFF_X18_Y4_N21</location>
		<fan_out>12</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>Operation:inst13|KeyFlagRefresh</name>
		<location>LCFF_X25_Y5_N1</location>
		<fan_out>18</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>Music:inst9|FullSpkS</name>
		<location>LCFF_X19_Y6_N9</location>
		<fan_out>2</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>I2C:inst8|CLK100KHz</name>
		<location>LCFF_X15_Y7_N1</location>
		<fan_out>12</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>Frequency:inst|\CLK1uS:Count2[8]</name>
		<location>LCFF_X18_Y4_N23</location>
		<fan_out>5</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>KeyBoard:inst3|clk4</name>
		<location>LCFF_X21_Y6_N25</location>
		<fan_out>12</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>Light:inst11|clk1</name>
		<location>LCFF_X25_Y1_N23</location>
		<fan_out>4</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>Light:inst11|clk~10</name>
		<location>LCCOMB_X26_Y1_N30</location>
		<fan_out>12</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>Operation:inst13|CLK2P</name>
		<location>LCFF_X25_Y6_N21</location>
		<fan_out>3</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>PS2:inst1|CLK</name>
		<location>LCFF_X22_Y8_N17</location>
		<fan_out>13</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>UART:inst7|Count[2]</name>
		<location>LCFF_X19_Y9_N21</location>
		<fan_out>14</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>I2C:inst8|LessThan~396</name>
		<location>LCCOMB_X15_Y7_N16</location>
		<fan_out>2</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>I2C:inst8|FLAG</name>
		<location>LCFF_X17_Y8_N19</location>
		<fan_out>8</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>Operation:inst13|RWI</name>
		<location>LCFF_X17_Y10_N31</location>
		<fan_out>29</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>KeyBoard:inst3|clk2</name>
		<location>LCFF_X21_Y3_N9</location>
		<fan_out>2</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>DS18B20:inst4|CLKCNT[4]</name>
		<location>LCFF_X22_Y4_N21</location>
		<fan_out>6</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>DS18B20:inst4|CLKCNT[5]</name>
		<location>LCFF_X22_Y4_N23</location>
		<fan_out>12</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>Frequency:inst|\CLK1uS:Count3[3]</name>
		<location>LCFF_X19_Y9_N7</location>
		<fan_out>7</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>Operation:inst13|KeyFlagValid2~10</name>
		<location>LCCOMB_X25_Y6_N14</location>
		<fan_out>3</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>DS18B20:inst4|LessThan~428</name>
		<location>LCCOMB_X22_Y4_N30</location>
		<fan_out>8</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>DS18B20:inst4|EOCtemp</name>
		<location>LCCOMB_X14_Y6_N16</location>
		<fan_out>9</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>RXD</name>
		<location>PIN_27</location>
		<fan_out>10</fan_out>
		<usage>Clock</usage>
		<global>no</global>
	</row>
	<row>
		<name>Frequency:inst|Period1uS</name>
		<location>LCFF_X27_Y7_N17</location>
		<fan_out>155</fan_out>
		<usage>Clock</usage>
		<global>yes</global>
		<global_resource_used>Global clock</global_resource_used>
		<global_line_name>GCLK7</global_line_name>
	</row>
	<row>
		<name>GCLKP1</name>
		<location>PIN_23</location>
		<fan_out>7</fan_out>
		<usage>Clock</usage>
		<global>yes</global>
		<global_resource_used>Global clock</global_resource_used>
		<global_line_name>GCLK2</global_line_name>
	</row>
	<row>
		<name>Frequency:inst|\CLK1uS:CountT[4]</name>
		<location>LCFF_X1_Y6_N21</location>
		<fan_out>20</fan_out>
		<usage>Clock</usage>
		<global>yes</global>
		<global_resource_used>Global clock</global_resource_used>
		<global_line_name>GCLK0</global_line_name>
	</row>
	<row>
		<name>Frequency:inst|\CLK1uS:Count1[9]</name>
		<location>LCFF_X12_Y8_N29</location>
		<fan_out>27</fan_out>
		<usage>Clock</usage>
		<global>yes</global>
		<global_resource_used>Global clock</global_resource_used>
		<global_line_name>GCLK1</global_line_name>
	</row>
	<row>
		<name>irDA:inst6|DataIN</name>
		<location>LCFF_X8_Y3_N23</location>
		<fan_out>38</fan_out>
		<usage>Async. clear, Clock</usage>
		<global>yes</global>
		<global_resource_used>Global clock</global_resource_used>
		<global_line_name>GCLK3</global_line_name>
	</row>
</control_signals>
<non_global_high_fan_out_signals>
	<row>
		<name>LCD1602:inst2|State[3]</name>
		<fan_out>21</fan_out>
	</row>
	<row>
		<name>LCD1602:inst2|State[1]</name>
		<fan_out>22</fan_out>
	</row>
	<row>
		<name>LCD1602:inst2|State[2]</name>
		<fan_out>21</fan_out>
	</row>
	<row>
		<name>LCD1602:inst2|LCD_RS~30</name>
		<fan_out>2</fan_out>
	</row>
	<row>
		<name>LCD1602:inst2|State[0]</name>
		<fan_out>21</fan_out>
	</row>
	<row>
		<name>LCD1602:inst2|LCD_RW~20</name>
		<fan_out>1</fan_out>
	</row>
	<row>
		<name>LCD1602:inst2|TEMP</name>
		<fan_out>2</fan_out>
	</row>
	<row>
		<name>VGA:inst10|VsyncB</name>
		<fan_out>1</fan_out>
	</row>
	<row>
		<name>VGA:inst10|HsyncB</name>
		<fan_out>12</fan_out>
	</row>
	<row>
		<name>Frequency:inst|\CLK1uS:Count1[9]</name>
		<fan_out>3</fan_out>
	</row>
</non_global_high_fan_out_signals>
<ram_summary>
	<row>
		<name>KeyBoard:inst3|altsyncram:reduce_or_rtl_0|altsyncram_o9m:auto_generated|ALTSYNCRAM</name>
		<type>AUTO</type>
		<mode>ROM</mode>
		<port_a_depth>256</port_a_depth>
		<port_a_width>5</port_a_width>
		<port_a_input_registers>yes</port_a_input_registers>
		<port_a_output_registers>no</port_a_output_registers>
		<size>1280</size>
		<m4ks>1</m4ks>
		<mif>EP2C5Q2080.rtl.mif</mif>
		<location>M4K_X23_Y7</location>
	</row>
</ram_summary>
<interconnect_usage_summary>
	<rsc name="Local interconnects" util="24" max=" 4608 " type="int">1110 </rsc>
	<rsc name="Block interconnects" util="12" max=" 15666 " type="int">1889 </rsc>
	<rsc name="R4 interconnects" util="9" max=" 13328 " type="int">1234 </rsc>
	<rsc name="R24 interconnects" util="7" max=" 652 " type="int">44 </rsc>
	<rsc name="C4 interconnects" util="8" max=" 11424 " type="int">944 </rsc>
	<rsc name="C16 interconnects" util="1" max=" 812 " type="int">10 </rsc>
	<rsc name="Global clocks" util="100" max=" 8 " type="int">8 </rsc>
	<rsc name="Direct links" util="2" max=" 15666 " type="int">333 </rsc>
</interconnect_usage_summary>
<mep_data>
	<command_line>quartus_fit --read_settings_files=off --write_settings_files=off EP2C5Q208 -c EP2C5Q208</command_line>
</mep_data>
<software_data>
	<smart_recompile>off</smart_recompile>
</software_data>
<messages>
	<warning>Warning: Following 1 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results</warning>
	<warning>Warning: Found 57 output pins without output pin load capacitance assignment</warning>
	<warning>Warning: Pin &quot;SDA&quot; has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis</warning>
	<warning>Warning: Pin &quot;DS18B20&quot; has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis</warning>
	<warning>Warning: Pin &quot;Segment[0]&quot; has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis</warning>
	<info>Info: Quartus II Fitter was successful. 0 errors, 60 warnings</info>
	<info>Info: Elapsed time: 00:00:14</info>
	<info>Info: Processing ended: Fri Dec 07 16:15:03 2007</info>
	<info>Info: Following groups of pins have the same output enable</info>
	<info>Info: Following pins have the same output enable: I2C:inst8|process9_748</info>
</messages>
<fitter_settings>
	<row>
		<option>Device</option>
		<setting>EP2C5Q208C8</setting>
	</row>
	<row>
		<option>SignalProbe signals routed during normal compilation</option>
		<setting>Off</setting>
		<default_value>Off</default_value>
	</row>
	<row>
		<option>Use smart compilation</option>
		<setting>Off</setting>
		<default_value>Off</default_value>
	</row>
	<row>
		<option>Router Timing Optimization Level</option>
		<setting>Normal</setting>
		<default_value>Normal</default_value>
	</row>
	<row>
		<option>Placement Effort Multiplier</option>
		<setting>1.0</setting>
		<default_value>1.0</default_value>
	</row>
	<row>