📄 freedev_cycloneii_50.fit.rpt
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; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[11] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT ; D[11] ; COMBOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[10] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT ; D[10] ; COMBOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[9] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT ; D[9] ; COMBOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[8] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT ; D[8] ; COMBOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[7] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT ; D[7] ; COMBOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[6] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT ; D[6] ; COMBOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[5] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT ; D[5] ; COMBOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[4] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT ; D[4] ; COMBOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[3] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT ; D[3] ; COMBOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[2] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT ; D[2] ; COMBOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[1] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT ; D[1] ; COMBOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[0] ; Packed Register ; Register Packing ; Fast Input Register assignment ; REGOUT ; D[0] ; COMBOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[15] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[15] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[14] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[14] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[13] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[13] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[12] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[12] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[11] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[11] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[10] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[10] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[9] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[9] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[8] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[8] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[7] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[7] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[6] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[6] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[5] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[5] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[4] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[4] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[3] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[3] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[2] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[2] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[1] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[1] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_outgoing_tri_state_bridge_0_data[0] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; D[0] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[24] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[24] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[23] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[23] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[22] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[22] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[21] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[21] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[20] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[20] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[19] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[19] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[18] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[18] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[17] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[17] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[16] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[16] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[15] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[15] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[14] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[14] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[13] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[13] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[12] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[12] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[11] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[11] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[10] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[10] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[9] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[9] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[8] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[8] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[7] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[7] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[6] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[6] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[5] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[5] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[4] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[4] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[3] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[3] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[2] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[2] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[1] ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; A[1] ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|select_n_to_the_cfi_flash_0 ; Packed Register ; Register Packing ; Fast Output Register assignment ; REGOUT ; FCS ; DATAIN ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle ; Packed Register ; Register Packing ; Fast Output Enable Register assignment ; REGOUT ; D[15] ; OE ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle ; Duplicated ; Register Packing ; Fast Output Enable Register assignment ; REGOUT ; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_1 ; REGOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle ; Duplicated ; Register Packing ; Fast Output Enable Register assignment ; REGOUT ; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_2 ; REGOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle ; Duplicated ; Register Packing ; Fast Output Enable Register assignment ; REGOUT ; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_3 ; REGOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle ; Duplicated ; Register Packing ; Fast Output Enable Register assignment ; REGOUT ; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_4 ; REGOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle ; Duplicated ; Register Packing ; Fast Output Enable Register assignment ; REGOUT ; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_5 ; REGOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle ; Duplicated ; Register Packing ; Fast Output Enable Register assignment ; REGOUT ; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_6 ; REGOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle ; Duplicated ; Register Packing ; Fast Output Enable Register assignment ; REGOUT ; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_7 ; REGOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle ; Duplicated ; Register Packing ; Fast Output Enable Register assignment ; REGOUT ; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_8 ; REGOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle ; Duplicated ; Register Packing ; Fast Output Enable Register assignment ; REGOUT ; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_9 ; REGOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle ; Duplicated ; Register Packing ; Fast Output Enable Register assignment ; REGOUT ; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_10 ; REGOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle ; Duplicated ; Register Packing ; Fast Output Enable Register assignment ; REGOUT ; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_11 ; REGOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle ; Duplicated ; Register Packing ; Fast Output Enable Register assignment ; REGOUT ; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_12 ; REGOUT ;
; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle ; Duplicated ; Register Packing ; Fast Output Enable Register assignment ; REGOUT ; freedev_cycloneII_50:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_in_a_write_cycle~_Duplicate_13 ; REGOUT ;
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