cpu.map.eqn

这是接上面程序

--G1L71Q is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[2]~2
--operation mode is clrb_cntr

G1L71Q = G1_q[2];

--G1L7 is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT
--operation mode is clrb_cntr

G1L7 = CARRY(G1_q[2] & (G1L5));


--acc_out[2] is acc_out[2]
--operation mode is normal

acc_out[2]_lut_out = A1L25 # A1L861 & A1L35;
acc_out[2] = DFFEA(acc_out[2]_lut_out, clock, , , reset, , );

--A1L62Q is acc_out[2]~74
--operation mode is normal

A1L62Q = acc_out[2];


--sysbus[2] is sysbus[2]
--operation mode is normal

sysbus[2]_lut_out = A1L299 & A1L533 # !A1L299 & (A1L4081);
sysbus[2] = DFFEA(sysbus[2]_lut_out, clock, reset, , , , );

--A1L5871Q is sysbus[2]~2667
--operation mode is normal

A1L5871Q = sysbus[2];


--A1L2501 is Mux~2853
--operation mode is normal

A1L2501 = mode[0] & (mode[1]) # !mode[0] & (mode[1] & acc_out[2] # !mode[1] & (sysbus[2]));

--A1L1341 is Mux~3253
--operation mode is normal

A1L1341 = mode[0] & (mode[1]) # !mode[0] & (mode[1] & acc_out[2] # !mode[1] & (sysbus[2]));


--IR_out[2] is IR_out[2]
--operation mode is normal

IR_out[2]_lut_out = A1L999 & (mdr[2]) # !A1L999 & instr_reg[2];
IR_out[2] = DFFEA(IR_out[2]_lut_out, clock, , , reset, , );

--A1L942Q is IR_out[2]~45
--operation mode is normal

A1L942Q = IR_out[2];


--A1L3501 is Mux~2854
--operation mode is normal

A1L3501 = mode[0] & (A1L2501 & (IR_out[2]) # !A1L2501 & G1_q[2]) # !mode[0] & (A1L2501);

--A1L2341 is Mux~3254
--operation mode is normal

A1L2341 = mode[0] & (A1L2501 & (IR_out[2]) # !A1L2501 & G1_q[2]) # !mode[0] & (A1L2501);


--A1L4501 is Mux~2855
--operation mode is normal

A1L4501 = mode[2] & (mode[1] # !A1L1501) # !mode[2] & (!A1L3501);

--A1L3341 is Mux~3255
--operation mode is normal

A1L3341 = mode[2] & (mode[1] # !A1L1501) # !mode[2] & (!A1L3501);

--A1L4341 is Mux~3256
--operation mode is normal

A1L4341 = mode[2] & (mode[1] # !A1L1501) # !mode[2] & (!A1L3501);


--mem[22][2] is mem[22][2]
--operation mode is normal

mem[22][2]_lut_out = mdr[2];
mem[22][2] = DFFEA(mem[22][2]_lut_out, clock, reset, , A1L887, , );

--A1L497Q is mem[22][2]~1378
--operation mode is normal

A1L497Q = mem[22][2];


--mem[26][2] is mem[26][2]
--operation mode is normal

mem[26][2]_lut_out = mdr[2];
mem[26][2] = DFFEA(mem[26][2]_lut_out, clock, reset, , A1L468, , );

--A1L078Q is mem[26][2]~1379
--operation mode is normal

A1L078Q = mem[26][2];


--mem[18][2] is mem[18][2]
--operation mode is normal

mem[18][2]_lut_out = mdr[2];
mem[18][2] = DFFEA(mem[18][2]_lut_out, clock, reset, , A1L217, , );

--A1L817Q is mem[18][2]~1380
--operation mode is normal

A1L817Q = mem[18][2];


--A1L5501 is Mux~2856
--operation mode is normal

A1L5501 = mem_addr[2] & (mem_addr[3]) # !mem_addr[2] & (mem_addr[3] & mem[26][2] # !mem_addr[3] & (mem[18][2]));

--A1L5341 is Mux~3257
--operation mode is normal

A1L5341 = mem_addr[2] & (mem_addr[3]) # !mem_addr[2] & (mem_addr[3] & mem[26][2] # !mem_addr[3] & (mem[18][2]));


--mem[30][2] is mem[30][2]
--operation mode is normal

mem[30][2]_lut_out = mdr[2];
mem[30][2] = DFFEA(mem[30][2]_lut_out, clock, reset, , A1L049, , );

--A1L649Q is mem[30][2]~1381
--operation mode is normal

A1L649Q = mem[30][2];


--A1L6501 is Mux~2857
--operation mode is normal

A1L6501 = mem_addr[2] & (A1L5501 & (mem[30][2]) # !A1L5501 & mem[22][2]) # !mem_addr[2] & (A1L5501);

--A1L6341 is Mux~3258
--operation mode is normal

A1L6341 = mem_addr[2] & (A1L5501 & (mem[30][2]) # !A1L5501 & mem[22][2]) # !mem_addr[2] & (A1L5501);


--mem[25][2] is mem[25][2]
--operation mode is normal

mem[25][2]_lut_out = mdr[2];
mem[25][2] = DFFEA(mem[25][2]_lut_out, clock, reset, , A1L548, , );

--A1L158Q is mem[25][2]~1382
--operation mode is normal

A1L158Q = mem[25][2];


--mem[21][2] is mem[21][2]
--operation mode is normal

mem[21][2]_lut_out = mdr[2];
mem[21][2] = DFFEA(mem[21][2]_lut_out, clock, reset, , A1L967, , );

--A1L577Q is mem[21][2]~1383
--operation mode is normal

A1L577Q = mem[21][2];


--mem[17][2] is mem[17][2]
--operation mode is normal

mem[17][2]_lut_out = mdr[2];
mem[17][2] = DFFEA(mem[17][2]_lut_out, clock, reset, , A1L396, , );

--A1L996Q is mem[17][2]~1384
--operation mode is normal

A1L996Q = mem[17][2];


--A1L7501 is Mux~2858
--operation mode is normal

A1L7501 = mem_addr[3] & (mem_addr[2]) # !mem_addr[3] & (mem_addr[2] & mem[21][2] # !mem_addr[2] & (mem[17][2]));

--A1L7341 is Mux~3259
--operation mode is normal

A1L7341 = mem_addr[3] & (mem_addr[2]) # !mem_addr[3] & (mem_addr[2] & mem[21][2] # !mem_addr[2] & (mem[17][2]));


--mem[29][2] is mem[29][2]
--operation mode is normal

mem[29][2]_lut_out = mdr[2];
mem[29][2] = DFFEA(mem[29][2]_lut_out, clock, reset, , A1L129, , );

--A1L729Q is mem[29][2]~1385
--operation mode is normal

A1L729Q = mem[29][2];


--A1L8501 is Mux~2859
--operation mode is normal

A1L8501 = mem_addr[3] & (A1L7501 & (mem[29][2]) # !A1L7501 & mem[25][2]) # !mem_addr[3] & (A1L7501);

--A1L8341 is Mux~3260
--operation mode is normal

A1L8341 = mem_addr[3] & (A1L7501 & (mem[29][2]) # !A1L7501 & mem[25][2]) # !mem_addr[3] & (A1L7501);


--mem[20][2] is mem[20][2]
--operation mode is normal

mem[20][2]_lut_out = mdr[2];
mem[20][2] = DFFEA(mem[20][2]_lut_out, clock, reset, , A1L057, , );

--A1L657Q is mem[20][2]~1386
--operation mode is normal

A1L657Q = mem[20][2];


--mem[24][2] is mem[24][2]
--operation mode is normal

mem[24][2]_lut_out = mdr[2];
mem[24][2] = DFFEA(mem[24][2]_lut_out, clock, reset, , A1L628, , );

--A1L238Q is mem[24][2]~1387
--operation mode is normal

A1L238Q = mem[24][2];


--mem[16][2] is mem[16][2]
--operation mode is normal

mem[16][2]_lut_out = mdr[2];
mem[16][2] = DFFEA(mem[16][2]_lut_out, clock, reset, , A1L476, , );

--A1L086Q is mem[16][2]~1388
--operation mode is normal

A1L086Q = mem[16][2];


--A1L9501 is Mux~2860
--operation mode is normal

A1L9501 = mem_addr[2] & (mem_addr[3]) # !mem_addr[2] & (mem_addr[3] & mem[24][2] # !mem_addr[3] & (mem[16][2]));

--A1L9341 is Mux~3261
--operation mode is normal

A1L9341 = mem_addr[2] & (mem_addr[3]) # !mem_addr[2] & (mem_addr[3] & mem[24][2] # !mem_addr[3] & (mem[16][2]));


--mem[28][2] is mem[28][2]
--operation mode is normal

mem[28][2]_lut_out = mdr[2];
mem[28][2] = DFFEA(mem[28][2]_lut_out, clock, reset, , A1L209, , );

--A1L809Q is mem[28][2]~1389
--operation mode is normal

A1L809Q = mem[28][2];


--A1L0601 is Mux~2861
--operation mode is normal

A1L0601 = mem_addr[2] & (A1L9501 & (mem[28][2]) # !A1L9501 & mem[20][2]) # !mem_addr[2] & (A1L9501);

--A1L0441 is Mux~3262
--operation mode is normal

A1L0441 = mem_addr[2] & (A1L9501 & (mem[28][2]) # !A1L9501 & mem[20][2]) # !mem_addr[2] & (A1L9501);


--A1L1601 is Mux~2862
--operation mode is normal

A1L1601 = mem_addr[1] & (mem_addr[0]) # !mem_addr[1] & (mem_addr[0] & A1L8501 # !mem_addr[0] & (A1L0601));

--A1L1441 is Mux~3263
--operation mode is normal

A1L1441 = mem_addr[1] & (mem_addr[0]) # !mem_addr[1] & (mem_addr[0] & A1L8501 # !mem_addr[0] & (A1L0601));


--mem[27][2] is mem[27][2]
--operation mode is normal

mem[27][2]_lut_out = mdr[2];
mem[27][2] = DFFEA(mem[27][2]_lut_out, clock, reset, , A1L388, , );

--A1L988Q is mem[27][2]~1390
--operation mode is normal

A1L988Q = mem[27][2];


--mem[23][2] is mem[23][2]
--operation mode is normal

mem[23][2]_lut_out = mdr[2];
mem[23][2] = DFFEA(mem[23][2]_lut_out, clock, reset, , A1L708, , );

--A1L318Q is mem[23][2]~1391
--operation mode is normal

A1L318Q = mem[23][2];


--mem[19][2] is mem[19][2]
--operation mode is normal

mem[19][2]_lut_out = mdr[2];
mem[19][2] = DFFEA(mem[19][2]_lut_out, clock, reset, , A1L137, , );

--A1L737Q is mem[19][2]~1392
--operation mode is normal

A1L737Q = mem[19][2];


--A1L2601 is Mux~2863
--operation mode is normal

A1L2601 = mem_addr[3] & (mem_addr[2]) # !mem_addr[3] & (mem_addr[2] & mem[23][2] # !mem_addr[2] & (mem[19][2]));

--A1L2441 is Mux~3264
--operation mode is normal

A1L2441 = mem_addr[3] & (mem_addr[2]) # !mem_addr[3] & (mem_addr[2] & mem[23][2] # !mem_addr[2] & (mem[19][2]));


--mem[31][2] is mem[31][2]
--operation mode is normal

mem[31][2]_lut_out = mdr[2];
mem[31][2] = DFFEA(mem[31][2]_lut_out, clock, reset, , A1L959, , );

--A1L569Q is mem[31][2]~1393
--operation mode is normal

A1L569Q = mem[31][2];


--A1L3601 is Mux~2864
--operation mode is normal

A1L3601 = mem_addr[3] & (A1L2601 & (mem[31][2]) # !A1L2601 & mem[27][2]) # !mem_addr[3] & (A1L2601);

--A1L3441 is Mux~3265
--operation mode is normal

A1L3441 = mem_addr[3] & (A1L2601 & (mem[31][2]) # !A1L2601 & mem[27][2]) # !mem_addr[3] & (A1L2601);


--A1L4601 is Mux~2865
--operation mode is normal

A1L4601 = mem_addr[1] & (A1L1601 & (A1L3601) # !A1L1601 & A1L6501) # !mem_addr[1] & (A1L1601);

--A1L4441 is Mux~3266
--operation mode is normal

A1L4441 = mem_addr[1] & (A1L1601 & (A1L3601) # !A1L1601 & A1L6501) # !mem_addr[1] & (A1L1601);


--mem[10][2] is mem[10][2]
--operation mode is normal

mem[10][2]_lut_out = mdr[2];
mem[10][2] = DFFEA(mem[10][2]_lut_out, clock, reset, , A1L065, , );

--A1L665Q is mem[10][2]~1394
--operation mode is normal

A1L665Q = mem[10][2];


--mem[9][2] is mem[9][2]
--operation mode is normal

mem[9][2]_lut_out = mdr[2];
mem[9][2] = DFFEA(mem[9][2]_lut_out, clock, reset, , A1L145, , );

--A1L745Q is mem[9][2]~1395
--operation mode is normal

A1L745Q = mem[9][2];


--mem[8][2] is mem[8][2]
--operation mode is normal

mem[8][2]_lut_out = mdr[2];
mem[8][2] = DFFEA(mem[8][2]_lut_out, clock, reset, , A1L225, , );

--A1L825Q is mem[8][2]~1396
--operation mode is normal

A1L825Q = mem[8][2];


--A1L5601 is Mux~2866
--operation mode is normal

A1L5601 = mem_addr[1] & (mem_addr[0]) # !mem_addr[1] & (mem_addr[0] & mem[9][2] # !mem_addr[0] & (mem[8][2]));

--A1L5441 is Mux~3267
--operation mode is normal

A1L5441 = mem_addr[1] & (mem_addr[0]) # !mem_addr[1] & (mem_addr[0] & mem[9][2] # !mem_addr[0] & (mem[8][2]));


--mem[11][2] is mem[11][2]
--operation mode is normal

mem[11][2]_lut_out = mdr[2];
mem[11][2] = DFFEA(mem[11][2]_lut_out, clock, reset, , A1L975, , );

--A1L585Q is mem[11][2]~1397
--operation mode is normal

A1L585Q = mem[11][2];


--A1L6601 is Mux~2867
--operation mode is normal

A1L6601 = mem_addr[1] & (A1L5601 & (mem[11][2]) # !A1L5601 & mem[10][2]) # !mem_addr[1] & (A1L5601);

--A1L6441 is Mux~3268
--operation mode is normal

A1L6441 = mem_addr[1] & (A1L5601 & (mem[11][2]) # !A1L5601 & mem[10][2]) # !mem_addr[1] & (A1L5601);


--mem[5][2] is mem[5][2]
--operation mode is normal

mem[5][2]_lut_out = mdr[2];
mem[5][2] = DFFEA(mem[5][2]_lut_out, clock, reset, , A1L564, , );

--A1L174Q is mem[5][2]~1398
--operation mode is normal

A1L174Q = mem[5][2];


--mem[6][2] is mem[6][2]
--operation mode is normal

mem[6][2]_lut_out = mdr[2];
mem[6][2] = DFFEA(mem[6][2]_lut_out, clock, reset, , A1L484, , );

--A1L094Q is mem[6][2]~1399
--operation mode is normal

A1L094Q = mem[6][2];


--mem[4][2] is mem[4][2]
--operation mode is normal

mem[4][2]_lut_out = mdr[2];
mem[4][2] = DFFEA(mem[4][2]_lut_out, clock, reset, , A1L644, , );

--A1L254Q is mem[4][2]~1400
--operation mode is normal

A1L254Q = mem[4][2];


--A1L7601 is Mux~2868
--operation mode is normal

A1L7601 = mem_addr[0] & (mem_addr[1]) # !mem_addr[0] & (mem_addr[1] & mem[6][2] # !mem_addr[1] & (mem[4][2]));

--A1L7441 is Mux~3269
--operation mode is normal

A1L7441 = mem_addr[0] & (mem_addr[1]) # !mem_addr[0] & (mem_addr[1] & mem[6][2] # !mem_addr[1] & (mem[4][2]));


--mem[7][2] is mem[7][2]
--operation mode is normal

mem[7][2]_lut_out = mdr[2];
mem[7][2] = DFFEA(mem[7][2]_lut_out, clock, reset, , A1L305, , );

--A1L905Q is mem[7][2]~1401
--operation mode is normal

A1L905Q = mem[7][2];


--A1L8601 is Mux~2869
--operation mode is normal

A1L8601 = mem_addr[0] & (A1L7601 & (mem[7][2]) # !A1L7601 & mem[5][2]) # !mem_addr[0] & (A1L7601);

--A1L8441 is Mux~3270
--operation mode is normal

A1L8441 = mem_addr[0] & (A1L7601 & (mem[7][2]) # !A1L7601 & mem[5][2]) # !mem_addr[0] & (A1L7601);


--mem[2][2] is mem[2][2]
--operation mode is normal

mem[2][2]_lut_out = !mdr[2];
mem[2][2] = DFFEA(mem[2][2]_lut_out, clock, reset, , A1L804, , );

--A1L414Q is mem[2][2]~1402
--operation mode is normal

A1L414Q = mem[2][2];


--mem[1][2] is mem[1][2]
--operation mode is normal

mem[1][2]_lut_out = !mdr[2];
mem[1][2] = DFFEA(mem[1][2]_lut_out, clock, reset, , A1L983, , );

--A1L593Q is mem[1][2]~1403
--operation mode is normal

A1L593Q = mem[1][2];


--mem[0][2] is mem[0][2]
--operation mode is normal

mem[0][2]_lut_out = !mdr[2];
mem[0][2] = DFFEA(mem[0][2]_lut_out, clock, reset, , A1L073, , );

--A1L673Q is mem[0][2]~1404
--operation mode is normal

A1L673Q = mem[0][2];


--A1L9601 is Mux~2870
--operation mode is normal

A1L9601 = mem_addr[1] & (mem