cpu.map.eqn

这是接上面程序

--operation mode is normal

A1L297Q = mem[22][1];


--mem[18][1] is mem[18][1]
--operation mode is normal

mem[18][1]_lut_out = mdr[1];
mem[18][1] = DFFEA(mem[18][1]_lut_out, clock, reset, , A1L217, , );

--A1L617Q is mem[18][1]~1352
--operation mode is normal

A1L617Q = mem[18][1];


--A1L3301 is Mux~2833
--operation mode is normal

A1L3301 = mem_addr[3] & (mem_addr[2]) # !mem_addr[3] & (mem_addr[2] & mem[22][1] # !mem_addr[2] & (mem[18][1]));

--A1L1141 is Mux~3233
--operation mode is normal

A1L1141 = mem_addr[3] & (mem_addr[2]) # !mem_addr[3] & (mem_addr[2] & mem[22][1] # !mem_addr[2] & (mem[18][1]));


--mem[30][1] is mem[30][1]
--operation mode is normal

mem[30][1]_lut_out = mdr[1];
mem[30][1] = DFFEA(mem[30][1]_lut_out, clock, reset, , A1L049, , );

--A1L449Q is mem[30][1]~1353
--operation mode is normal

A1L449Q = mem[30][1];


--A1L4301 is Mux~2834
--operation mode is normal

A1L4301 = mem_addr[3] & (A1L3301 & (mem[30][1]) # !A1L3301 & mem[26][1]) # !mem_addr[3] & (A1L3301);

--A1L2141 is Mux~3234
--operation mode is normal

A1L2141 = mem_addr[3] & (A1L3301 & (mem[30][1]) # !A1L3301 & mem[26][1]) # !mem_addr[3] & (A1L3301);


--mem[24][1] is mem[24][1]
--operation mode is normal

mem[24][1]_lut_out = mdr[1];
mem[24][1] = DFFEA(mem[24][1]_lut_out, clock, reset, , A1L628, , );

--A1L038Q is mem[24][1]~1354
--operation mode is normal

A1L038Q = mem[24][1];


--mem[20][1] is mem[20][1]
--operation mode is normal

mem[20][1]_lut_out = mdr[1];
mem[20][1] = DFFEA(mem[20][1]_lut_out, clock, reset, , A1L057, , );

--A1L457Q is mem[20][1]~1355
--operation mode is normal

A1L457Q = mem[20][1];


--mem[16][1] is mem[16][1]
--operation mode is normal

mem[16][1]_lut_out = mdr[1];
mem[16][1] = DFFEA(mem[16][1]_lut_out, clock, reset, , A1L476, , );

--A1L876Q is mem[16][1]~1356
--operation mode is normal

A1L876Q = mem[16][1];


--A1L5301 is Mux~2835
--operation mode is normal

A1L5301 = mem_addr[3] & (mem_addr[2]) # !mem_addr[3] & (mem_addr[2] & mem[20][1] # !mem_addr[2] & (mem[16][1]));

--A1L3141 is Mux~3235
--operation mode is normal

A1L3141 = mem_addr[3] & (mem_addr[2]) # !mem_addr[3] & (mem_addr[2] & mem[20][1] # !mem_addr[2] & (mem[16][1]));


--mem[28][1] is mem[28][1]
--operation mode is normal

mem[28][1]_lut_out = mdr[1];
mem[28][1] = DFFEA(mem[28][1]_lut_out, clock, reset, , A1L209, , );

--A1L609Q is mem[28][1]~1357
--operation mode is normal

A1L609Q = mem[28][1];


--A1L6301 is Mux~2836
--operation mode is normal

A1L6301 = mem_addr[3] & (A1L5301 & (mem[28][1]) # !A1L5301 & mem[24][1]) # !mem_addr[3] & (A1L5301);

--A1L4141 is Mux~3236
--operation mode is normal

A1L4141 = mem_addr[3] & (A1L5301 & (mem[28][1]) # !A1L5301 & mem[24][1]) # !mem_addr[3] & (A1L5301);


--A1L7301 is Mux~2837
--operation mode is normal

A1L7301 = mem_addr[0] & (mem_addr[1]) # !mem_addr[0] & (mem_addr[1] & A1L4301 # !mem_addr[1] & (A1L6301));

--A1L5141 is Mux~3237
--operation mode is normal

A1L5141 = mem_addr[0] & (mem_addr[1]) # !mem_addr[0] & (mem_addr[1] & A1L4301 # !mem_addr[1] & (A1L6301));


--mem[23][1] is mem[23][1]
--operation mode is normal

mem[23][1]_lut_out = mdr[1];
mem[23][1] = DFFEA(mem[23][1]_lut_out, clock, reset, , A1L708, , );

--A1L118Q is mem[23][1]~1358
--operation mode is normal

A1L118Q = mem[23][1];


--mem[27][1] is mem[27][1]
--operation mode is normal

mem[27][1]_lut_out = mdr[1];
mem[27][1] = DFFEA(mem[27][1]_lut_out, clock, reset, , A1L388, , );

--A1L788Q is mem[27][1]~1359
--operation mode is normal

A1L788Q = mem[27][1];


--mem[19][1] is mem[19][1]
--operation mode is normal

mem[19][1]_lut_out = mdr[1];
mem[19][1] = DFFEA(mem[19][1]_lut_out, clock, reset, , A1L137, , );

--A1L537Q is mem[19][1]~1360
--operation mode is normal

A1L537Q = mem[19][1];


--A1L8301 is Mux~2838
--operation mode is normal

A1L8301 = mem_addr[2] & (mem_addr[3]) # !mem_addr[2] & (mem_addr[3] & mem[27][1] # !mem_addr[3] & (mem[19][1]));

--A1L6141 is Mux~3238
--operation mode is normal

A1L6141 = mem_addr[2] & (mem_addr[3]) # !mem_addr[2] & (mem_addr[3] & mem[27][1] # !mem_addr[3] & (mem[19][1]));


--mem[31][1] is mem[31][1]
--operation mode is normal

mem[31][1]_lut_out = mdr[1];
mem[31][1] = DFFEA(mem[31][1]_lut_out, clock, reset, , A1L959, , );

--A1L369Q is mem[31][1]~1361
--operation mode is normal

A1L369Q = mem[31][1];


--A1L9301 is Mux~2839
--operation mode is normal

A1L9301 = mem_addr[2] & (A1L8301 & (mem[31][1]) # !A1L8301 & mem[23][1]) # !mem_addr[2] & (A1L8301);

--A1L7141 is Mux~3239
--operation mode is normal

A1L7141 = mem_addr[2] & (A1L8301 & (mem[31][1]) # !A1L8301 & mem[23][1]) # !mem_addr[2] & (A1L8301);


--A1L0401 is Mux~2840
--operation mode is normal

A1L0401 = mem_addr[0] & (A1L7301 & (A1L9301) # !A1L7301 & A1L2301) # !mem_addr[0] & (A1L7301);

--A1L8141 is Mux~3240
--operation mode is normal

A1L8141 = mem_addr[0] & (A1L7301 & (A1L9301) # !A1L7301 & A1L2301) # !mem_addr[0] & (A1L7301);


--mem[6][1] is mem[6][1]
--operation mode is normal

mem[6][1]_lut_out = mdr[1];
mem[6][1] = DFFEA(mem[6][1]_lut_out, clock, reset, , A1L484, , );

--A1L884Q is mem[6][1]~1362
--operation mode is normal

A1L884Q = mem[6][1];


--mem[5][1] is mem[5][1]
--operation mode is normal

mem[5][1]_lut_out = !mdr[1];
mem[5][1] = DFFEA(mem[5][1]_lut_out, clock, reset, , A1L564, , );

--A1L964Q is mem[5][1]~1363
--operation mode is normal

A1L964Q = mem[5][1];


--mem[4][1] is mem[4][1]
--operation mode is normal

mem[4][1]_lut_out = !mdr[1];
mem[4][1] = DFFEA(mem[4][1]_lut_out, clock, reset, , A1L644, , );

--A1L054Q is mem[4][1]~1364
--operation mode is normal

A1L054Q = mem[4][1];


--A1L1401 is Mux~2841
--operation mode is normal

A1L1401 = mem_addr[1] & (mem_addr[0]) # !mem_addr[1] & (mem_addr[0] & !mem[5][1] # !mem_addr[0] & (!mem[4][1]));

--A1L9141 is Mux~3241
--operation mode is normal

A1L9141 = mem_addr[1] & (mem_addr[0]) # !mem_addr[1] & (mem_addr[0] & !mem[5][1] # !mem_addr[0] & (!mem[4][1]));


--mem[7][1] is mem[7][1]
--operation mode is normal

mem[7][1]_lut_out = mdr[1];
mem[7][1] = DFFEA(mem[7][1]_lut_out, clock, reset, , A1L305, , );

--A1L705Q is mem[7][1]~1365
--operation mode is normal

A1L705Q = mem[7][1];


--A1L2401 is Mux~2842
--operation mode is normal

A1L2401 = mem_addr[1] & (A1L1401 & (mem[7][1]) # !A1L1401 & mem[6][1]) # !mem_addr[1] & (A1L1401);

--A1L0241 is Mux~3242
--operation mode is normal

A1L0241 = mem_addr[1] & (A1L1401 & (mem[7][1]) # !A1L1401 & mem[6][1]) # !mem_addr[1] & (A1L1401);


--mem[9][1] is mem[9][1]
--operation mode is normal

mem[9][1]_lut_out = mdr[1];
mem[9][1] = DFFEA(mem[9][1]_lut_out, clock, reset, , A1L145, , );

--A1L545Q is mem[9][1]~1366
--operation mode is normal

A1L545Q = mem[9][1];


--mem[10][1] is mem[10][1]
--operation mode is normal

mem[10][1]_lut_out = mdr[1];
mem[10][1] = DFFEA(mem[10][1]_lut_out, clock, reset, , A1L065, , );

--A1L465Q is mem[10][1]~1367
--operation mode is normal

A1L465Q = mem[10][1];


--mem[8][1] is mem[8][1]
--operation mode is normal

mem[8][1]_lut_out = mdr[1];
mem[8][1] = DFFEA(mem[8][1]_lut_out, clock, reset, , A1L225, , );

--A1L625Q is mem[8][1]~1368
--operation mode is normal

A1L625Q = mem[8][1];


--A1L3401 is Mux~2843
--operation mode is normal

A1L3401 = mem_addr[0] & (mem_addr[1]) # !mem_addr[0] & (mem_addr[1] & mem[10][1] # !mem_addr[1] & (mem[8][1]));

--A1L1241 is Mux~3243
--operation mode is normal

A1L1241 = mem_addr[0] & (mem_addr[1]) # !mem_addr[0] & (mem_addr[1] & mem[10][1] # !mem_addr[1] & (mem[8][1]));


--mem[11][1] is mem[11][1]
--operation mode is normal

mem[11][1]_lut_out = mdr[1];
mem[11][1] = DFFEA(mem[11][1]_lut_out, clock, reset, , A1L975, , );

--A1L385Q is mem[11][1]~1369
--operation mode is normal

A1L385Q = mem[11][1];


--A1L4401 is Mux~2844
--operation mode is normal

A1L4401 = mem_addr[0] & (A1L3401 & (mem[11][1]) # !A1L3401 & mem[9][1]) # !mem_addr[0] & (A1L3401);

--A1L2241 is Mux~3244
--operation mode is normal

A1L2241 = mem_addr[0] & (A1L3401 & (mem[11][1]) # !A1L3401 & mem[9][1]) # !mem_addr[0] & (A1L3401);


--mem[1][1] is mem[1][1]
--operation mode is normal

mem[1][1]_lut_out = mdr[1];
mem[1][1] = DFFEA(mem[1][1]_lut_out, clock, reset, , A1L983, , );

--A1L393Q is mem[1][1]~1370
--operation mode is normal

A1L393Q = mem[1][1];


--mem[2][1] is mem[2][1]
--operation mode is normal

mem[2][1]_lut_out = !mdr[1];
mem[2][1] = DFFEA(mem[2][1]_lut_out, clock, reset, , A1L804, , );

--A1L214Q is mem[2][1]~1371
--operation mode is normal

A1L214Q = mem[2][1];


--mem[0][1] is mem[0][1]
--operation mode is normal

mem[0][1]_lut_out = mdr[1];
mem[0][1] = DFFEA(mem[0][1]_lut_out, clock, reset, , A1L073, , );

--A1L473Q is mem[0][1]~1372
--operation mode is normal

A1L473Q = mem[0][1];


--A1L5401 is Mux~2845
--operation mode is normal

A1L5401 = mem_addr[0] & (mem_addr[1]) # !mem_addr[0] & (mem_addr[1] & !mem[2][1] # !mem_addr[1] & (mem[0][1]));

--A1L3241 is Mux~3245
--operation mode is normal

A1L3241 = mem_addr[0] & (mem_addr[1]) # !mem_addr[0] & (mem_addr[1] & !mem[2][1] # !mem_addr[1] & (mem[0][1]));


--mem[3][1] is mem[3][1]
--operation mode is normal

mem[3][1]_lut_out = !mdr[1];
mem[3][1] = DFFEA(mem[3][1]_lut_out, clock, reset, , A1L724, , );

--A1L134Q is mem[3][1]~1373
--operation mode is normal

A1L134Q = mem[3][1];


--A1L6401 is Mux~2846
--operation mode is normal

A1L6401 = mem_addr[0] & (A1L5401 & (!mem[3][1]) # !A1L5401 & mem[1][1]) # !mem_addr[0] & (A1L5401);

--A1L4241 is Mux~3246
--operation mode is normal

A1L4241 = mem_addr[0] & (A1L5401 & (!mem[3][1]) # !A1L5401 & mem[1][1]) # !mem_addr[0] & (A1L5401);


--A1L7401 is Mux~2847
--operation mode is normal

A1L7401 = mem_addr[2] & (mem_addr[3]) # !mem_addr[2] & (mem_addr[3] & A1L4401 # !mem_addr[3] & (A1L6401));

--A1L5241 is Mux~3247
--operation mode is normal

A1L5241 = mem_addr[2] & (mem_addr[3]) # !mem_addr[2] & (mem_addr[3] & A1L4401 # !mem_addr[3] & (A1L6401));


--mem[14][1] is mem[14][1]
--operation mode is normal

mem[14][1]_lut_out = mdr[1];
mem[14][1] = DFFEA(mem[14][1]_lut_out, clock, reset, , A1L636, , );

--A1L046Q is mem[14][1]~1374
--operation mode is normal

A1L046Q = mem[14][1];


--mem[13][1] is mem[13][1]
--operation mode is normal

mem[13][1]_lut_out = mdr[1];
mem[13][1] = DFFEA(mem[13][1]_lut_out, clock, reset, , A1L716, , );

--A1L126Q is mem[13][1]~1375
--operation mode is normal

A1L126Q = mem[13][1];


--mem[12][1] is mem[12][1]
--operation mode is normal

mem[12][1]_lut_out = mdr[1];
mem[12][1] = DFFEA(mem[12][1]_lut_out, clock, reset, , A1L895, , );

--A1L206Q is mem[12][1]~1376
--operation mode is normal

A1L206Q = mem[12][1];


--A1L8401 is Mux~2848
--operation mode is normal

A1L8401 = mem_addr[1] & (mem_addr[0]) # !mem_addr[1] & (mem_addr[0] & mem[13][1] # !mem_addr[0] & (mem[12][1]));

--A1L6241 is Mux~3248
--operation mode is normal

A1L6241 = mem_addr[1] & (mem_addr[0]) # !mem_addr[1] & (mem_addr[0] & mem[13][1] # !mem_addr[0] & (mem[12][1]));


--mem[15][1] is mem[15][1]
--operation mode is normal

mem[15][1]_lut_out = mdr[1];
mem[15][1] = DFFEA(mem[15][1]_lut_out, clock, reset, , A1L556, , );

--A1L956Q is mem[15][1]~1377
--operation mode is normal

A1L956Q = mem[15][1];


--A1L9401 is Mux~2849
--operation mode is normal

A1L9401 = mem_addr[1] & (A1L8401 & (mem[15][1]) # !A1L8401 & mem[14][1]) # !mem_addr[1] & (A1L8401);

--A1L7241 is Mux~3249
--operation mode is normal

A1L7241 = mem_addr[1] & (A1L8401 & (mem[15][1]) # !A1L8401 & mem[14][1]) # !mem_addr[1] & (A1L8401);


--A1L0501 is Mux~2850
--operation mode is normal

A1L0501 = mem_addr[2] & (A1L7401 & (A1L9401) # !A1L7401 & A1L2401) # !mem_addr[2] & (A1L7401);

--A1L8241 is Mux~3250
--operation mode is normal

A1L8241 = mem_addr[2] & (A1L7401 & (A1L9401) # !A1L7401 & A1L2401) # !mem_addr[2] & (A1L7401);


--A1L4531 is Mux~3168
--operation mode is normal

A1L4531 = (A1L5101 & !A1L0401 & (!A1L0501 # !A1L6201) # !A1L5101 & (!A1L0501 # !A1L6201)) & CASCADE(A1L8041);

--A1L9241 is Mux~3251
--operation mode is normal

A1L9241 = (A1L5101 & !A1L0401 & (!A1L0501 # !A1L6201) # !A1L5101 & (!A1L0501 # !A1L6201)) & CASCADE(A1L8041);


--mdr_out[2] is mdr_out[2]
--operation mode is normal

mdr_out[2]_lut_out = A1L533;
mdr_out[2] = DFFEA(mdr_out[2]_lut_out, clock, , , reset, , );

--A1L503Q is mdr_out[2]~42
--operation mode is normal

A1L503Q = mdr_out[2];


--mar_out[2] is mar_out[2]
--operation mode is normal

mar_out[2]_lut_out = A1L399 & (mar[2]) # !A1L399 & A1L4081;
mar_out[2] = DFFEA(mar_out[2]_lut_out, clock, , , reset, , );

--A1L772Q is mar_out[2]~37
--operation mode is normal

A1L772Q = mar_out[2];


--A1L1501 is Mux~2852
--operation mode is normal

A1L1501 = mode[0] & mdr_out[2] # !mode[0] & (mar_out[2]);

--A1L0341 is Mux~3252
--operation mode is normal

A1L0341 = mode[0] & mdr_out[2] # !mode[0] & (mar_out[2]);


--G1_q[2] is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[2]
--operation mode is clrb_cntr

G1_q[2]_lut_out = ((G1_q[2] $ (A1L799 & G1L5) & A1L091) # (mdr[2] & !A1L091)) & VCC;
G1_q[2] = DFFEA(G1_q[2]_lut_out, clock, reset, , , , );