cpu.map.eqn

这是接上面程序

--A1L9831 is Mux~3211
--operation mode is normal

A1L9831 = mem_addr[3] & (A1L2101 & (mem[31][0]) # !A1L2101 & mem[27][0]) # !mem_addr[3] & (A1L2101);


--A1L4101 is Mux~2813
--operation mode is normal

A1L4101 = mem_addr[1] & (A1L1101 & (A1L3101) # !A1L1101 & A1L6001) # !mem_addr[1] & (A1L1101);

--A1L0931 is Mux~3212
--operation mode is normal

A1L0931 = mem_addr[1] & (A1L1101 & (A1L3101) # !A1L1101 & A1L6001) # !mem_addr[1] & (A1L1101);


--A1L5101 is Mux~2814
--operation mode is normal

A1L5101 = mem_addr[4] & mode[2] & mode[1] & !mode[0];

--A1L1931 is Mux~3213
--operation mode is normal

A1L1931 = mem_addr[4] & mode[2] & mode[1] & !mode[0];


--mem[10][0] is mem[10][0]
--operation mode is normal

mem[10][0]_lut_out = mdr[0];
mem[10][0] = DFFEA(mem[10][0]_lut_out, clock, reset, , A1L065, , );

--A1L165Q is mem[10][0]~1330
--operation mode is normal

A1L165Q = mem[10][0];


--mem[9][0] is mem[9][0]
--operation mode is normal

mem[9][0]_lut_out = mdr[0];
mem[9][0] = DFFEA(mem[9][0]_lut_out, clock, reset, , A1L145, , );

--A1L245Q is mem[9][0]~1331
--operation mode is normal

A1L245Q = mem[9][0];


--mem[8][0] is mem[8][0]
--operation mode is normal

mem[8][0]_lut_out = mdr[0];
mem[8][0] = DFFEA(mem[8][0]_lut_out, clock, reset, , A1L225, , );

--A1L325Q is mem[8][0]~1332
--operation mode is normal

A1L325Q = mem[8][0];


--A1L6101 is Mux~2815
--operation mode is normal

A1L6101 = mem_addr[1] & (mem_addr[0]) # !mem_addr[1] & (mem_addr[0] & mem[9][0] # !mem_addr[0] & (mem[8][0]));

--A1L2931 is Mux~3214
--operation mode is normal

A1L2931 = mem_addr[1] & (mem_addr[0]) # !mem_addr[1] & (mem_addr[0] & mem[9][0] # !mem_addr[0] & (mem[8][0]));


--mem[11][0] is mem[11][0]
--operation mode is normal

mem[11][0]_lut_out = mdr[0];
mem[11][0] = DFFEA(mem[11][0]_lut_out, clock, reset, , A1L975, , );

--A1L085Q is mem[11][0]~1333
--operation mode is normal

A1L085Q = mem[11][0];


--A1L7101 is Mux~2816
--operation mode is normal

A1L7101 = mem_addr[1] & (A1L6101 & (mem[11][0]) # !A1L6101 & mem[10][0]) # !mem_addr[1] & (A1L6101);

--A1L3931 is Mux~3215
--operation mode is normal

A1L3931 = mem_addr[1] & (A1L6101 & (mem[11][0]) # !A1L6101 & mem[10][0]) # !mem_addr[1] & (A1L6101);


--mem[5][0] is mem[5][0]
--operation mode is normal

mem[5][0]_lut_out = !mdr[0];
mem[5][0] = DFFEA(mem[5][0]_lut_out, clock, reset, , A1L564, , );

--A1L664Q is mem[5][0]~1334
--operation mode is normal

A1L664Q = mem[5][0];


--mem[6][0] is mem[6][0]
--operation mode is normal

mem[6][0]_lut_out = mdr[0];
mem[6][0] = DFFEA(mem[6][0]_lut_out, clock, reset, , A1L484, , );

--A1L584Q is mem[6][0]~1335
--operation mode is normal

A1L584Q = mem[6][0];


--mem[4][0] is mem[4][0]
--operation mode is normal

mem[4][0]_lut_out = mdr[0];
mem[4][0] = DFFEA(mem[4][0]_lut_out, clock, reset, , A1L644, , );

--A1L744Q is mem[4][0]~1336
--operation mode is normal

A1L744Q = mem[4][0];


--A1L8101 is Mux~2817
--operation mode is normal

A1L8101 = mem_addr[0] & (mem_addr[1]) # !mem_addr[0] & (mem_addr[1] & mem[6][0] # !mem_addr[1] & (mem[4][0]));

--A1L4931 is Mux~3216
--operation mode is normal

A1L4931 = mem_addr[0] & (mem_addr[1]) # !mem_addr[0] & (mem_addr[1] & mem[6][0] # !mem_addr[1] & (mem[4][0]));


--mem[7][0] is mem[7][0]
--operation mode is normal

mem[7][0]_lut_out = mdr[0];
mem[7][0] = DFFEA(mem[7][0]_lut_out, clock, reset, , A1L305, , );

--A1L405Q is mem[7][0]~1337
--operation mode is normal

A1L405Q = mem[7][0];


--A1L9101 is Mux~2818
--operation mode is normal

A1L9101 = mem_addr[0] & (A1L8101 & (mem[7][0]) # !A1L8101 & !mem[5][0]) # !mem_addr[0] & (A1L8101);

--A1L5931 is Mux~3217
--operation mode is normal

A1L5931 = mem_addr[0] & (A1L8101 & (mem[7][0]) # !A1L8101 & !mem[5][0]) # !mem_addr[0] & (A1L8101);


--mem[2][0] is mem[2][0]
--operation mode is normal

mem[2][0]_lut_out = mdr[0];
mem[2][0] = DFFEA(mem[2][0]_lut_out, clock, reset, , A1L804, , );

--A1L904Q is mem[2][0]~1338
--operation mode is normal

A1L904Q = mem[2][0];


--mem[1][0] is mem[1][0]
--operation mode is normal

mem[1][0]_lut_out = !mdr[0];
mem[1][0] = DFFEA(mem[1][0]_lut_out, clock, reset, , A1L983, , );

--A1L093Q is mem[1][0]~1339
--operation mode is normal

A1L093Q = mem[1][0];


--mem[0][0] is mem[0][0]
--operation mode is normal

mem[0][0]_lut_out = mdr[0];
mem[0][0] = DFFEA(mem[0][0]_lut_out, clock, reset, , A1L073, , );

--A1L173Q is mem[0][0]~1340
--operation mode is normal

A1L173Q = mem[0][0];


--A1L0201 is Mux~2819
--operation mode is normal

A1L0201 = mem_addr[1] & (mem_addr[0]) # !mem_addr[1] & (mem_addr[0] & !mem[1][0] # !mem_addr[0] & (mem[0][0]));

--A1L6931 is Mux~3218
--operation mode is normal

A1L6931 = mem_addr[1] & (mem_addr[0]) # !mem_addr[1] & (mem_addr[0] & !mem[1][0] # !mem_addr[0] & (mem[0][0]));


--mem[3][0] is mem[3][0]
--operation mode is normal

mem[3][0]_lut_out = !mdr[0];
mem[3][0] = DFFEA(mem[3][0]_lut_out, clock, reset, , A1L724, , );

--A1L824Q is mem[3][0]~1341
--operation mode is normal

A1L824Q = mem[3][0];


--A1L1201 is Mux~2820
--operation mode is normal

A1L1201 = mem_addr[1] & (A1L0201 & (!mem[3][0]) # !A1L0201 & mem[2][0]) # !mem_addr[1] & (A1L0201);

--A1L7931 is Mux~3219
--operation mode is normal

A1L7931 = mem_addr[1] & (A1L0201 & (!mem[3][0]) # !A1L0201 & mem[2][0]) # !mem_addr[1] & (A1L0201);


--A1L2201 is Mux~2821
--operation mode is normal

A1L2201 = mem_addr[3] & (mem_addr[2]) # !mem_addr[3] & (mem_addr[2] & A1L9101 # !mem_addr[2] & (A1L1201));

--A1L8931 is Mux~3220
--operation mode is normal

A1L8931 = mem_addr[3] & (mem_addr[2]) # !mem_addr[3] & (mem_addr[2] & A1L9101 # !mem_addr[2] & (A1L1201));


--mem[13][0] is mem[13][0]
--operation mode is normal

mem[13][0]_lut_out = mdr[0];
mem[13][0] = DFFEA(mem[13][0]_lut_out, clock, reset, , A1L716, , );

--A1L816Q is mem[13][0]~1342
--operation mode is normal

A1L816Q = mem[13][0];


--mem[14][0] is mem[14][0]
--operation mode is normal

mem[14][0]_lut_out = mdr[0];
mem[14][0] = DFFEA(mem[14][0]_lut_out, clock, reset, , A1L636, , );

--A1L736Q is mem[14][0]~1343
--operation mode is normal

A1L736Q = mem[14][0];


--mem[12][0] is mem[12][0]
--operation mode is normal

mem[12][0]_lut_out = mdr[0];
mem[12][0] = DFFEA(mem[12][0]_lut_out, clock, reset, , A1L895, , );

--A1L995Q is mem[12][0]~1344
--operation mode is normal

A1L995Q = mem[12][0];


--A1L3201 is Mux~2822
--operation mode is normal

A1L3201 = mem_addr[0] & (mem_addr[1]) # !mem_addr[0] & (mem_addr[1] & mem[14][0] # !mem_addr[1] & (mem[12][0]));

--A1L9931 is Mux~3221
--operation mode is normal

A1L9931 = mem_addr[0] & (mem_addr[1]) # !mem_addr[0] & (mem_addr[1] & mem[14][0] # !mem_addr[1] & (mem[12][0]));


--mem[15][0] is mem[15][0]
--operation mode is normal

mem[15][0]_lut_out = mdr[0];
mem[15][0] = DFFEA(mem[15][0]_lut_out, clock, reset, , A1L556, , );

--A1L656Q is mem[15][0]~1345
--operation mode is normal

A1L656Q = mem[15][0];


--A1L4201 is Mux~2823
--operation mode is normal

A1L4201 = mem_addr[0] & (A1L3201 & (mem[15][0]) # !A1L3201 & mem[13][0]) # !mem_addr[0] & (A1L3201);

--A1L0041 is Mux~3222
--operation mode is normal

A1L0041 = mem_addr[0] & (A1L3201 & (mem[15][0]) # !A1L3201 & mem[13][0]) # !mem_addr[0] & (A1L3201);


--A1L5201 is Mux~2824
--operation mode is normal

A1L5201 = mem_addr[3] & (A1L2201 & (A1L4201) # !A1L2201 & A1L7101) # !mem_addr[3] & (A1L2201);

--A1L1041 is Mux~3223
--operation mode is normal

A1L1041 = mem_addr[3] & (A1L2201 & (A1L4201) # !A1L2201 & A1L7101) # !mem_addr[3] & (A1L2201);


--A1L6201 is Mux~2825
--operation mode is normal

A1L6201 = mode[2] & mode[1] & !mem_addr[4] & !mode[0];

--A1L2041 is Mux~3224
--operation mode is normal

A1L2041 = mode[2] & mode[1] & !mem_addr[4] & !mode[0];


--A1L3531 is Mux~3167
--operation mode is normal

A1L3531 = (A1L4101 & !A1L5101 & (!A1L6201 # !A1L5201) # !A1L4101 & (!A1L6201 # !A1L5201)) & CASCADE(A1L0831);

--A1L3041 is Mux~3225
--operation mode is normal

A1L3041 = (A1L4101 & !A1L5101 & (!A1L6201 # !A1L5201) # !A1L4101 & (!A1L6201 # !A1L5201)) & CASCADE(A1L0831);


--mdr_out[1] is mdr_out[1]
--operation mode is normal

mdr_out[1]_lut_out = A1L233;
mdr_out[1] = DFFEA(mdr_out[1]_lut_out, clock, , , reset, , );

--A1L303Q is mdr_out[1]~41
--operation mode is normal

A1L303Q = mdr_out[1];


--mar_out[1] is mar_out[1]
--operation mode is normal

mar_out[1]_lut_out = A1L399 & (mar[1]) # !A1L399 & A1L1081;
mar_out[1] = DFFEA(mar_out[1]_lut_out, clock, , , reset, , );

--A1L572Q is mar_out[1]~36
--operation mode is normal

A1L572Q = mar_out[1];


--A1L7201 is Mux~2827
--operation mode is normal

A1L7201 = mode[0] & mdr_out[1] # !mode[0] & (mar_out[1]);

--A1L4041 is Mux~3226
--operation mode is normal

A1L4041 = mode[0] & mdr_out[1] # !mode[0] & (mar_out[1]);


--G1_q[1] is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is clrb_cntr

G1_q[1]_lut_out = ((G1_q[1] $ (A1L799 & G1L3) & A1L091) # (mdr[1] & !A1L091)) & VCC;
G1_q[1] = DFFEA(G1_q[1]_lut_out, clock, reset, , , , );

--G1L51Q is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[1]~1
--operation mode is clrb_cntr

G1L51Q = G1_q[1];

--G1L5 is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is clrb_cntr

G1L5 = CARRY(G1_q[1] & (G1L3));


--acc_out[1] is acc_out[1]
--operation mode is normal

acc_out[1]_lut_out = A1L94 # A1L861 & A1L05;
acc_out[1] = DFFEA(acc_out[1]_lut_out, clock, , , reset, , );

--A1L42Q is acc_out[1]~73
--operation mode is normal

A1L42Q = acc_out[1];


--sysbus[1] is sysbus[1]
--operation mode is normal

sysbus[1]_lut_out = A1L299 & A1L233 # !A1L299 & (A1L1081);
sysbus[1] = DFFEA(sysbus[1]_lut_out, clock, reset, , , , );

--A1L3871Q is sysbus[1]~2666
--operation mode is normal

A1L3871Q = sysbus[1];


--A1L8201 is Mux~2828
--operation mode is normal

A1L8201 = mode[0] & (mode[1]) # !mode[0] & (mode[1] & acc_out[1] # !mode[1] & (sysbus[1]));

--A1L5041 is Mux~3227
--operation mode is normal

A1L5041 = mode[0] & (mode[1]) # !mode[0] & (mode[1] & acc_out[1] # !mode[1] & (sysbus[1]));


--IR_out[1] is IR_out[1]
--operation mode is normal

IR_out[1]_lut_out = A1L999 & (mdr[1]) # !A1L999 & instr_reg[1];
IR_out[1] = DFFEA(IR_out[1]_lut_out, clock, , , reset, , );

--A1L742Q is IR_out[1]~44
--operation mode is normal

A1L742Q = IR_out[1];


--A1L9201 is Mux~2829
--operation mode is normal

A1L9201 = mode[0] & (A1L8201 & (IR_out[1]) # !A1L8201 & G1_q[1]) # !mode[0] & (A1L8201);

--A1L6041 is Mux~3228
--operation mode is normal

A1L6041 = mode[0] & (A1L8201 & (IR_out[1]) # !A1L8201 & G1_q[1]) # !mode[0] & (A1L8201);


--A1L0301 is Mux~2830
--operation mode is normal

A1L0301 = mode[2] & (mode[1] # !A1L7201) # !mode[2] & (!A1L9201);

--A1L7041 is Mux~3229
--operation mode is normal

A1L7041 = mode[2] & (mode[1] # !A1L7201) # !mode[2] & (!A1L9201);

--A1L8041 is Mux~3230
--operation mode is normal

A1L8041 = mode[2] & (mode[1] # !A1L7201) # !mode[2] & (!A1L9201);


--mem[21][1] is mem[21][1]
--operation mode is normal

mem[21][1]_lut_out = mdr[1];
mem[21][1] = DFFEA(mem[21][1]_lut_out, clock, reset, , A1L967, , );

--A1L377Q is mem[21][1]~1346
--operation mode is normal

A1L377Q = mem[21][1];


--mem[25][1] is mem[25][1]
--operation mode is normal

mem[25][1]_lut_out = mdr[1];
mem[25][1] = DFFEA(mem[25][1]_lut_out, clock, reset, , A1L548, , );

--A1L948Q is mem[25][1]~1347
--operation mode is normal

A1L948Q = mem[25][1];


--mem[17][1] is mem[17][1]
--operation mode is normal

mem[17][1]_lut_out = mdr[1];
mem[17][1] = DFFEA(mem[17][1]_lut_out, clock, reset, , A1L396, , );

--A1L796Q is mem[17][1]~1348
--operation mode is normal

A1L796Q = mem[17][1];


--A1L1301 is Mux~2831
--operation mode is normal

A1L1301 = mem_addr[2] & (mem_addr[3]) # !mem_addr[2] & (mem_addr[3] & mem[25][1] # !mem_addr[3] & (mem[17][1]));

--A1L9041 is Mux~3231
--operation mode is normal

A1L9041 = mem_addr[2] & (mem_addr[3]) # !mem_addr[2] & (mem_addr[3] & mem[25][1] # !mem_addr[3] & (mem[17][1]));


--mem[29][1] is mem[29][1]
--operation mode is normal

mem[29][1]_lut_out = mdr[1];
mem[29][1] = DFFEA(mem[29][1]_lut_out, clock, reset, , A1L129, , );

--A1L529Q is mem[29][1]~1349
--operation mode is normal

A1L529Q = mem[29][1];


--A1L2301 is Mux~2832
--operation mode is normal

A1L2301 = mem_addr[2] & (A1L1301 & (mem[29][1]) # !A1L1301 & mem[21][1]) # !mem_addr[2] & (A1L1301);

--A1L0141 is Mux~3232
--operation mode is normal

A1L0141 = mem_addr[2] & (A1L1301 & (mem[29][1]) # !A1L1301 & mem[21][1]) # !mem_addr[2] & (A1L1301);


--mem[26][1] is mem[26][1]
--operation mode is normal

mem[26][1]_lut_out = mdr[1];
mem[26][1] = DFFEA(mem[26][1]_lut_out, clock, reset, , A1L468, , );

--A1L868Q is mem[26][1]~1350
--operation mode is normal

A1L868Q = mem[26][1];


--mem[22][1] is mem[22][1]
--operation mode is normal

mem[22][1]_lut_out = mdr[1];
mem[22][1] = DFFEA(mem[22][1]_lut_out, clock, reset, , A1L887, , );

--A1L297Q is mem[22][1]~1351