cpu.map.eqn

这是接上面程序

-- Copyright (C) 1991-2005 Altera Corporation
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-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
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-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--A1L631Q is data_r_out[0]~reg0
--operation mode is normal

A1L631Q_lut_out = !A1L789;
A1L631Q = DFFEA(A1L631Q_lut_out, clock, , , reset, , );

--A1L531Q is data_r_out[0]~54
--operation mode is normal

A1L531Q = A1L631Q;


--A1L931Q is data_r_out[1]~reg0
--operation mode is normal

A1L931Q_lut_out = A1L889;
A1L931Q = DFFEA(A1L931Q_lut_out, clock, , , reset, , );

--A1L831Q is data_r_out[1]~55
--operation mode is normal

A1L831Q = A1L931Q;


--A1L241Q is data_r_out[2]~reg0
--operation mode is normal

A1L241Q_lut_out = A1L989;
A1L241Q = DFFEA(A1L241Q_lut_out, clock, , , reset, , );

--A1L141Q is data_r_out[2]~56
--operation mode is normal

A1L141Q = A1L241Q;


--A1L541Q is data_r_out[3]~reg0
--operation mode is normal

A1L541Q_lut_out = A1L599;
A1L541Q = DFFEA(A1L541Q_lut_out, clock, , , reset, , );

--A1L441Q is data_r_out[3]~57
--operation mode is normal

A1L441Q = A1L541Q;


--A1L841Q is data_r_out[4]~reg0
--operation mode is normal

A1L841Q_lut_out = A1L499;
A1L841Q = DFFEA(A1L841Q_lut_out, clock, , , reset, , );

--A1L741Q is data_r_out[4]~58
--operation mode is normal

A1L741Q = A1L841Q;


--A1L351Q is data_r_out[5]~reg0
--operation mode is normal

A1L351Q_lut_out = add_r[0] & add_r[2] & add_r[1];
A1L351Q = DFFEA(A1L351Q_lut_out, clock, , , reset, , );

--A1L151Q is data_r_out[5]~59
--operation mode is normal

A1L151Q = A1L351Q;


--A1L651Q is data_r_out[6]~reg0
--operation mode is normal

A1L651Q_lut_out = A1L699;
A1L651Q = DFFEA(A1L651Q_lut_out, clock, , , reset, , );

--A1L551Q is data_r_out[6]~60
--operation mode is normal

A1L551Q = A1L651Q;


--A1L951Q is data_r_out[7]~reg0
--operation mode is normal

A1L951Q_lut_out = A1L099;
A1L951Q = DFFEA(A1L951Q_lut_out, clock, , , reset, , );

--A1L851Q is data_r_out[7]~61
--operation mode is normal

A1L851Q = A1L951Q;


--A1L261Q is data_r_out[8]~reg0
--operation mode is normal

A1L261Q_lut_out = A1L199;
A1L261Q = DFFEA(A1L261Q_lut_out, clock, , , reset, , );

--A1L161Q is data_r_out[8]~62
--operation mode is normal

A1L161Q = A1L261Q;


--A1L661Q is data_r_out[10]~reg0
--operation mode is normal

A1L661Q_lut_out = A1L799;
A1L661Q = DFFEA(A1L661Q_lut_out, clock, , , reset, , );

--A1L561Q is data_r_out[10]~63
--operation mode is normal

A1L561Q = A1L661Q;


--A1L171Q is data_r_out[11]~reg0
--operation mode is normal

A1L171Q_lut_out = add_r[1] & add_r[2] & !add_r[3];
A1L171Q = DFFEA(A1L171Q_lut_out, clock, , , reset, , );

--A1L961Q is data_r_out[11]~64
--operation mode is normal

A1L961Q = A1L171Q;


--A1L471Q is data_r_out[12]~reg0
--operation mode is normal

A1L471Q_lut_out = A1L899;
A1L471Q = DFFEA(A1L471Q_lut_out, clock, , , reset, , );

--A1L371Q is data_r_out[12]~65
--operation mode is normal

A1L371Q = A1L471Q;


--A1L771Q is data_r_out[13]~reg0
--operation mode is normal

A1L771Q_lut_out = A1L299;
A1L771Q = DFFEA(A1L771Q_lut_out, clock, , , reset, , );

--A1L671Q is data_r_out[13]~66
--operation mode is normal

A1L671Q = A1L771Q;


--A1L081Q is data_r_out[14]~reg0
--operation mode is normal

A1L081Q_lut_out = !A1L399;
A1L081Q = DFFEA(A1L081Q_lut_out, clock, , , reset, , );

--A1L971Q is data_r_out[14]~67
--operation mode is normal

A1L971Q = A1L081Q;


--A1L381Q is data_r_out[15]~reg0
--operation mode is normal

A1L381Q_lut_out = A1L999;
A1L381Q = DFFEA(A1L381Q_lut_out, clock, , , reset, , );

--A1L281Q is data_r_out[15]~68
--operation mode is normal

A1L281Q = A1L381Q;


--A1L781Q is data_r_out[17]~reg0
--operation mode is normal

A1L781Q_lut_out = A1L0001;
A1L781Q = DFFEA(A1L781Q_lut_out, clock, , , reset, , );

--A1L681Q is data_r_out[17]~69
--operation mode is normal

A1L681Q = A1L781Q;


--A1L391Q is data_r_out[19]~reg0
--operation mode is normal

A1L391Q_lut_out = add_r[0] & add_r[2] & add_r[3];
A1L391Q = DFFEA(A1L391Q_lut_out, clock, , , reset, , );

--A1L191Q is data_r_out[19]~70
--operation mode is normal

A1L191Q = A1L391Q;


--A1L7471Q is op_out[0]~reg0
--operation mode is normal

A1L7471Q_lut_out = IR_out[5];
A1L7471Q = DFFEA(A1L7471Q_lut_out, clock, , , reset, , );

--A1L6471Q is op_out[0]~3
--operation mode is normal

A1L6471Q = A1L7471Q;


--A1L0571Q is op_out[1]~reg0
--operation mode is normal

A1L0571Q_lut_out = IR_out[6];
A1L0571Q = DFFEA(A1L0571Q_lut_out, clock, , , reset, , );

--A1L9471Q is op_out[1]~4
--operation mode is normal

A1L9471Q = A1L0571Q;


--A1L3571Q is op_out[2]~reg0
--operation mode is normal

A1L3571Q_lut_out = IR_out[7];
A1L3571Q = DFFEA(A1L3571Q_lut_out, clock, , , reset, , );

--A1L2571Q is op_out[2]~5
--operation mode is normal

A1L2571Q = A1L3571Q;


--A1L111Q is add_r_out[0]~reg0
--operation mode is normal

A1L111Q_lut_out = A1L3671 & (A1L521) # !A1L3671 & IR_out[5];
A1L111Q = DFFEA(A1L111Q_lut_out, clock, , , reset, , );

--A1L011Q is add_r_out[0]~39
--operation mode is normal

A1L011Q = A1L111Q;


--A1L411Q is add_r_out[1]~reg0
--operation mode is normal

A1L411Q_lut_out = A1L3671 & (A1L621) # !A1L3671 & IR_out[6];
A1L411Q = DFFEA(A1L411Q_lut_out, clock, , , reset, , );

--A1L311Q is add_r_out[1]~40
--operation mode is normal

A1L311Q = A1L411Q;


--A1L711Q is add_r_out[2]~reg0
--operation mode is normal

A1L711Q_lut_out = A1L3671 & (!A1L721) # !A1L3671 & IR_out[7];
A1L711Q = DFFEA(A1L711Q_lut_out, clock, , , reset, , );

--A1L611Q is add_r_out[2]~41
--operation mode is normal

A1L611Q = A1L711Q;


--A1L021Q is add_r_out[3]~reg0
--operation mode is normal

A1L021Q_lut_out = A1L599 # A1L421 & !A1L889;
A1L021Q = DFFEA(A1L021Q_lut_out, clock, , , reset, , );

--A1L911Q is add_r_out[3]~42
--operation mode is normal

A1L911Q = A1L021Q;


--A1L321Q is add_r_out[4]~reg0
--operation mode is normal

A1L321Q_lut_out = A1L499 & (A1L889 # !A1L421);
A1L321Q = DFFEA(A1L321Q_lut_out, clock, , , reset, , );

--A1L221Q is add_r_out[4]~43
--operation mode is normal

A1L221Q = A1L321Q;


--A1L689 is Mux~2754
--operation mode is normal

A1L689 = !mode[1] # !mode[2] # !mode[0];

--A1L1631 is Mux~3183
--operation mode is normal

A1L1631 = !mode[1] # !mode[2] # !mode[0];


--add_r[0] is add_r[0]
--operation mode is normal

add_r[0]_lut_out = A1L3671 & A1L521 # !A1L3671 & (IR_out[5]);
add_r[0] = DFFEA(add_r[0]_lut_out, clock, reset, , , , );

--A1L101Q is add_r[0]~493
--operation mode is normal

A1L101Q = add_r[0];


--add_r[1] is add_r[1]
--operation mode is normal

add_r[1]_lut_out = A1L3671 & A1L621 # !A1L3671 & (IR_out[6]);
add_r[1] = DFFEA(add_r[1]_lut_out, clock, reset, , , , );

--A1L301Q is add_r[1]~494
--operation mode is normal

A1L301Q = add_r[1];


--add_r[2] is add_r[2]
--operation mode is normal

add_r[2]_lut_out = A1L3671 & (!A1L721) # !A1L3671 & IR_out[7];
add_r[2] = DFFEA(add_r[2]_lut_out, clock, reset, , , , );

--A1L501Q is add_r[2]~495
--operation mode is normal

A1L501Q = add_r[2];


--add_r[3] is add_r[3]
--operation mode is normal

add_r[3]_lut_out = A1L599 # A1L421 & (!A1L889);
add_r[3] = DFFEA(add_r[3]_lut_out, clock, reset, , , , );

--A1L701Q is add_r[3]~496
--operation mode is normal

A1L701Q = add_r[3];


--A1L789 is Mux~2762
--operation mode is normal

A1L789 = add_r[2] # add_r[0] & !add_r[1] & !add_r[3] # !add_r[0] & (add_r[3]);

--A1L2631 is Mux~3184
--operation mode is normal

A1L2631 = add_r[2] # add_r[0] & !add_r[1] & !add_r[3] # !add_r[0] & (add_r[3]);


--A1L889 is Mux~2763
--operation mode is normal

A1L889 = !add_r[2] & (add_r[1] # add_r[0] & !add_r[3]);

--A1L3631 is Mux~3185
--operation mode is normal

A1L3631 = !add_r[2] & (add_r[1] # add_r[0] & !add_r[3]);


--A1L989 is Mux~2764
--operation mode is normal

A1L989 = !add_r[2] & (add_r[3] # add_r[0] & add_r[1]);

--A1L4631 is Mux~3186
--operation mode is normal

A1L4631 = !add_r[2] & (add_r[3] # add_r[0] & add_r[1]);


--A1L051 is data_r_out[5]~29
--operation mode is normal

A1L051 = add_r[1] & add_r[0] & add_r[2];

--A1L251 is data_r_out[5]~71
--operation mode is normal

A1L251 = add_r[1] & add_r[0] & add_r[2];


--A1L099 is Mux~2765
--operation mode is normal

A1L099 = add_r[0] & !add_r[2] & (add_r[1] $ !add_r[3]) # !add_r[0] & add_r[3] & (!add_r[2] # !add_r[1]);

--A1L5631 is Mux~3187
--operation mode is normal

A1L5631 = add_r[0] & !add_r[2] & (add_r[1] $ !add_r[3]) # !add_r[0] & add_r[3] & (!add_r[2] # !add_r[1]);


--A1L199 is Mux~2766
--operation mode is normal

A1L199 = add_r[1] & (!add_r[2] & add_r[3]) # !add_r[1] & (add_r[0] $ (add_r[3]));

--A1L6631 is Mux~3188
--operation mode is normal

A1L6631 = add_r[1] & (!add_r[2] & add_r[3]) # !add_r[1] & (add_r[0] $ (add_r[3]));


--A1L861 is data_r_out[11]~32
--operation mode is normal

A1L861 = add_r[2] & add_r[1] & (!add_r[3]);

--A1L071 is data_r_out[11]~72
--operation mode is normal

A1L071 = add_r[2] & add_r[1] & (!add_r[3]);


--A1L299 is Mux~2767
--operation mode is normal

A1L299 = add_r[0] & add_r[2] & (add_r[1] $ add_r[3]) # !add_r[0] & !add_r[3] & (add_r[1] # add_r[2]);

--A1L7631 is Mux~3189
--operation mode is normal

A1L7631 = add_r[0] & add_r[2] & (add_r[1] $ add_r[3]) # !add_r[0] & !add_r[3] & (add_r[1] # add_r[2]);


--A1L399 is Mux~2768
--operation mode is normal

A1L399 = add_r[2] # add_r[3] # add_r[0] $ add_r[1];

--A1L8631 is Mux~3190
--operation mode is normal

A1L8631 = add_r[2] # add_r[3] # add_r[0] $ add_r[1];


--A1L091 is data_r_out[19]~36
--operation mode is normal

A1L091 = !add_r[2] # !add_r[0] # !add_r[3];

--A1L291 is data_r_out[19]~73
--operation mode is normal

A1L291 = !add_r[2] # !add_r[0] # !add_r[3];


--IR_out[5] is IR_out[5]
--operation mode is normal

IR_out[5]_lut_out = A1L999 & (mdr[5]) # !A1L999 & instr_reg[5];
IR_out[5] = DFFEA(IR_out[5]_lut_out, clock, , , reset, , );

--A1L552Q is IR_out[5]~40
--operation mode is normal

A1L552Q = IR_out[5];


--IR_out[6] is IR_out[6]
--operation mode is normal

IR_out[6]_lut_out = A1L999 & (mdr[6]) # !A1L999 & instr_reg[6];
IR_out[6] = DFFEA(IR_out[6]_lut_out, clock, , , reset, , );

--A1L752Q is IR_out[6]~41
--operation mode is normal

A1L752Q = IR_out[6];


--IR_out[7] is IR_out[7]
--operation mode is normal

IR_out[7]_lut_out = A1L999 & (mdr[7]) # !A1L999 & instr_reg[7];
IR_out[7] = DFFEA(IR_out[7]_lut_out, clock, , , reset, , );

--A1L952Q is IR_out[7]~42
--operation mode is normal

A1L952Q = IR_out[7];


--A1L499 is Mux~2793
--operation mode is normal

A1L499 = add_r[2] & add_r[3] & !add_r[0] & !add_r[1];

--A1L9631 is Mux~3191
--operation mode is normal

A1L9631 = add_r[2] & add_r[3] & !add_r[0] & !add_r[1];


--A1L599 is Mux~2794
--operation mode is normal

A1L599 = add_r[1] & add_r[0] & !add_r[3] & !add_r[2];

--A1L0731 is Mux~3192
--operation mode is normal

A1L0731 = add_r[1] & add_r[0] & !add_r[3] & !add_r[2];


--A1L421 is add_r~485
--operation mode is normal

A1L421 = A1L499 & A1L789 & !A1L599 & !A1L989;

--A1L821 is add_r~497
--operation mode is normal

A1L821 = A1L499 & A1L789 & !A1L599 & !A1L989;


--z_flag is z_flag
--operation mode is normal

z_flag_lut_out = A1L5671;
z_flag = DFFEA(z_flag_lut_out, clock, reset, , , , );

--A1L7281Q is z_flag~2
--operation mode is normal

A1L7281Q = z_flag;


--A1L521 is add_r~486
--operation mode is normal

A1L521 = A1L421 & !z_flag & !A1L889 # !A1L789;