cpu.fit.eqn

这是接上面程序

--operation mode is normal

A1L434Q = mem[3][1];


--A1L9401 is Mux~2846 at LC5_F49
--operation mode is normal

A1L9401 = A1L8401 & (!mem_addr[0] # !mem[3][1]) # !A1L8401 & (mem_addr[0] & mem[1][1]);

--A1L7241 is Mux~3246 at LC5_F49
--operation mode is normal

A1L7241 = A1L8401 & (!mem_addr[0] # !mem[3][1]) # !A1L8401 & (mem_addr[0] & mem[1][1]);


--A1L0501 is Mux~2847 at LC1_F48
--operation mode is normal

A1L0501 = mem_addr[3] & (A1L7401 # mem_addr[2]) # !mem_addr[3] & A1L9401 & (!mem_addr[2]);

--A1L8241 is Mux~3247 at LC1_F48
--operation mode is normal

A1L8241 = mem_addr[3] & (A1L7401 # mem_addr[2]) # !mem_addr[3] & A1L9401 & (!mem_addr[2]);


--mem[14][1] is mem[14][1] at LC1_F47
--operation mode is normal

mem[14][1]_lut_out = mdr[1];
mem[14][1] = DFFEA(mem[14][1]_lut_out, GLOBAL(clock), reset, , A1L936, , );

--A1L346Q is mem[14][1]~1374 at LC1_F47
--operation mode is normal

A1L346Q = mem[14][1];


--mem[13][1] is mem[13][1] at LC3_F47
--operation mode is normal

mem[13][1]_lut_out = mdr[1];
mem[13][1] = DFFEA(mem[13][1]_lut_out, GLOBAL(clock), reset, , A1L026, , );

--A1L426Q is mem[13][1]~1375 at LC3_F47
--operation mode is normal

A1L426Q = mem[13][1];


--mem[12][1] is mem[12][1] at LC5_F47
--operation mode is normal

mem[12][1]_lut_out = mdr[1];
mem[12][1] = DFFEA(mem[12][1]_lut_out, GLOBAL(clock), reset, , A1L106, , );

--A1L506Q is mem[12][1]~1376 at LC5_F47
--operation mode is normal

A1L506Q = mem[12][1];


--A1L1501 is Mux~2848 at LC6_F47
--operation mode is normal

A1L1501 = mem_addr[0] & (mem[13][1] # mem_addr[1]) # !mem_addr[0] & mem[12][1] & (!mem_addr[1]);

--A1L9241 is Mux~3248 at LC6_F47
--operation mode is normal

A1L9241 = mem_addr[0] & (mem[13][1] # mem_addr[1]) # !mem_addr[0] & mem[12][1] & (!mem_addr[1]);


--mem[15][1] is mem[15][1] at LC7_F47
--operation mode is normal

mem[15][1]_lut_out = mdr[1];
mem[15][1] = DFFEA(mem[15][1]_lut_out, GLOBAL(clock), reset, , A1L856, , );

--A1L266Q is mem[15][1]~1377 at LC7_F47
--operation mode is normal

A1L266Q = mem[15][1];


--A1L2501 is Mux~2849 at LC4_F47
--operation mode is normal

A1L2501 = A1L1501 & (mem[15][1] # !mem_addr[1]) # !A1L1501 & (mem_addr[1] & mem[14][1]);

--A1L0341 is Mux~3249 at LC4_F47
--operation mode is normal

A1L0341 = A1L1501 & (mem[15][1] # !mem_addr[1]) # !A1L1501 & (mem_addr[1] & mem[14][1]);


--A1L3501 is Mux~2850 at LC4_I33
--operation mode is normal

A1L3501 = A1L0501 & (A1L2501 # !mem_addr[2]) # !A1L0501 & (mem_addr[2] & A1L5401);

--A1L1341 is Mux~3250 at LC4_I33
--operation mode is normal

A1L1341 = A1L0501 & (A1L2501 # !mem_addr[2]) # !A1L0501 & (mem_addr[2] & A1L5401);


--A1L7531 is Mux~3168 at LC6_I33
--operation mode is normal

A1L7531 = (A1L3501 & !A1L9201 & (!A1L8101 # !A1L3401) # !A1L3501 & (!A1L8101 # !A1L3401)) & CASCADE(A1L1141);

--A1L2341 is Mux~3251 at LC6_I33
--operation mode is normal

A1L2341 = (A1L3501 & !A1L9201 & (!A1L8101 # !A1L3401) # !A1L3501 & (!A1L8101 # !A1L3401)) & CASCADE(A1L1141);


--mdr_out[2] is mdr_out[2] at LC7_I33
--operation mode is normal

mdr_out[2]_lut_out = A1L833;
mdr_out[2] = DFFEA(mdr_out[2]_lut_out, GLOBAL(clock), , , reset, , );

--A1L803Q is mdr_out[2]~42 at LC7_I33
--operation mode is normal

A1L803Q = mdr_out[2];


--mar_out[2] is mar_out[2] at LC3_I32
--operation mode is normal

mar_out[2]_lut_out = A1L699 & mar[2] # !A1L699 & (A1L7081);
mar_out[2] = DFFEA(mar_out[2]_lut_out, GLOBAL(clock), , , reset, , );

--A1L082Q is mar_out[2]~37 at LC3_I32
--operation mode is normal

A1L082Q = mar_out[2];


--A1L4501 is Mux~2852 at LC8_I33
--operation mode is normal

A1L4501 = mode[0] & (mdr_out[2]) # !mode[0] & mar_out[2];

--A1L3341 is Mux~3252 at LC8_I33
--operation mode is normal

A1L3341 = mode[0] & (mdr_out[2]) # !mode[0] & mar_out[2];


--G1_q[2] is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[2] at LC4_C12
--operation mode is clrb_cntr

G1_q[2]_lut_out = ((G1_q[2] $ (A1L0001 & G1L5) & A1L391) # (mdr[2] & !A1L391)) & VCC;
G1_q[2] = DFFEA(G1_q[2]_lut_out, GLOBAL(clock), reset, , , , );

--G1L71Q is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[2]~2 at LC4_C12
--operation mode is clrb_cntr

G1L71Q = G1_q[2];

--G1L7 is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT at LC4_C12
--operation mode is clrb_cntr

G1L7 = CARRY(G1_q[2] & (G1L5));


--acc_out[2] is acc_out[2] at LC4_C37
--operation mode is normal

acc_out[2]_lut_out = A1L25 # A1L35 & A1L071;
acc_out[2] = DFFEA(acc_out[2]_lut_out, GLOBAL(clock), , , reset, , );

--A1L62Q is acc_out[2]~74 at LC4_C37
--operation mode is normal

A1L62Q = acc_out[2];


--sysbus[2] is sysbus[2] at LC6_I32
--operation mode is normal

sysbus[2]_lut_out = A1L599 & (A1L833) # !A1L599 & A1L7081;
sysbus[2] = DFFEA(sysbus[2]_lut_out, GLOBAL(clock), reset, , , , );

--A1L8871Q is sysbus[2]~2667 at LC6_I32
--operation mode is normal

A1L8871Q = sysbus[2];


--A1L5501 is Mux~2853 at LC5_C37
--operation mode is normal

A1L5501 = mode[1] & (acc_out[2] # mode[0]) # !mode[1] & sysbus[2] & (!mode[0]);

--A1L4341 is Mux~3253 at LC5_C37
--operation mode is normal

A1L4341 = mode[1] & (acc_out[2] # mode[0]) # !mode[1] & sysbus[2] & (!mode[0]);


--IR_out[2] is IR_out[2] at LC4_C52
--operation mode is normal

IR_out[2]_lut_out = A1L2001 & mdr[2] # !A1L2001 & (instr_reg[2]);
IR_out[2] = DFFEA(IR_out[2]_lut_out, GLOBAL(clock), , , reset, , );

--A1L252Q is IR_out[2]~45 at LC4_C52
--operation mode is normal

A1L252Q = IR_out[2];


--A1L6501 is Mux~2854 at LC3_C37
--operation mode is normal

A1L6501 = A1L5501 & (IR_out[2] # !mode[0]) # !A1L5501 & (mode[0] & G1_q[2]);

--A1L5341 is Mux~3254 at LC3_C37
--operation mode is normal

A1L5341 = A1L5501 & (IR_out[2] # !mode[0]) # !A1L5501 & (mode[0] & G1_q[2]);


--A1L7501 is Mux~2855 at LC2_I33
--operation mode is normal

A1L7501 = mode[2] & (mode[1] # !A1L4501) # !mode[2] & !A1L6501;

--A1L6341 is Mux~3255 at LC2_I33
--operation mode is normal

A1L6341 = mode[2] & (mode[1] # !A1L4501) # !mode[2] & !A1L6501;

--A1L7341 is Mux~3256 at LC2_I33
--operation mode is normal

A1L7341 = mode[2] & (mode[1] # !A1L4501) # !mode[2] & !A1L6501;


--mem[22][2] is mem[22][2] at LC1_I52
--operation mode is normal

mem[22][2]_lut_out = mdr[2];
mem[22][2] = DFFEA(mem[22][2]_lut_out, GLOBAL(clock), reset, , A1L197, , );

--A1L797Q is mem[22][2]~1378 at LC1_I52
--operation mode is normal

A1L797Q = mem[22][2];


--mem[26][2] is mem[26][2] at LC2_I52
--operation mode is normal

mem[26][2]_lut_out = mdr[2];
mem[26][2] = DFFEA(mem[26][2]_lut_out, GLOBAL(clock), reset, , A1L768, , );

--A1L378Q is mem[26][2]~1379 at LC2_I52
--operation mode is normal

A1L378Q = mem[26][2];


--mem[18][2] is mem[18][2] at LC3_I52
--operation mode is normal

mem[18][2]_lut_out = mdr[2];
mem[18][2] = DFFEA(mem[18][2]_lut_out, GLOBAL(clock), reset, , A1L517, , );

--A1L127Q is mem[18][2]~1380 at LC3_I52
--operation mode is normal

A1L127Q = mem[18][2];


--A1L8501 is Mux~2856 at LC5_I52
--operation mode is normal

A1L8501 = mem_addr[3] & (mem[26][2] # mem_addr[2]) # !mem_addr[3] & mem[18][2] & (!mem_addr[2]);

--A1L8341 is Mux~3257 at LC5_I52
--operation mode is normal

A1L8341 = mem_addr[3] & (mem[26][2] # mem_addr[2]) # !mem_addr[3] & mem[18][2] & (!mem_addr[2]);


--mem[30][2] is mem[30][2] at LC6_I52
--operation mode is normal

mem[30][2]_lut_out = mdr[2];
mem[30][2] = DFFEA(mem[30][2]_lut_out, GLOBAL(clock), reset, , A1L349, , );

--A1L949Q is mem[30][2]~1381 at LC6_I52
--operation mode is normal

A1L949Q = mem[30][2];


--A1L9501 is Mux~2857 at LC4_I52
--operation mode is normal

A1L9501 = A1L8501 & (mem[30][2] # !mem_addr[2]) # !A1L8501 & (mem_addr[2] & mem[22][2]);

--A1L9341 is Mux~3258 at LC4_I52
--operation mode is normal

A1L9341 = A1L8501 & (mem[30][2] # !mem_addr[2]) # !A1L8501 & (mem_addr[2] & mem[22][2]);


--mem[25][2] is mem[25][2] at LC5_I36
--operation mode is normal

mem[25][2]_lut_out = mdr[2];
mem[25][2] = DFFEA(mem[25][2]_lut_out, GLOBAL(clock), reset, , A1L848, , );

--A1L458Q is mem[25][2]~1382 at LC5_I36
--operation mode is normal

A1L458Q = mem[25][2];


--mem[21][2] is mem[21][2] at LC3_I36
--operation mode is normal

mem[21][2]_lut_out = mdr[2];
mem[21][2] = DFFEA(mem[21][2]_lut_out, GLOBAL(clock), reset, , A1L277, , );

--A1L877Q is mem[21][2]~1383 at LC3_I36
--operation mode is normal

A1L877Q = mem[21][2];


--mem[17][2] is mem[17][2] at LC4_I36
--operation mode is normal

mem[17][2]_lut_out = mdr[2];
mem[17][2] = DFFEA(mem[17][2]_lut_out, GLOBAL(clock), reset, , A1L696, , );

--A1L207Q is mem[17][2]~1384 at LC4_I36
--operation mode is normal

A1L207Q = mem[17][2];


--A1L0601 is Mux~2858 at LC6_I36
--operation mode is normal

A1L0601 = mem_addr[2] & (mem[21][2] # mem_addr[3]) # !mem_addr[2] & mem[17][2] & (!mem_addr[3]);

--A1L0441 is Mux~3259 at LC6_I36
--operation mode is normal

A1L0441 = mem_addr[2] & (mem[21][2] # mem_addr[3]) # !mem_addr[2] & mem[17][2] & (!mem_addr[3]);


--mem[29][2] is mem[29][2] at LC2_I43
--operation mode is normal

mem[29][2]_lut_out = mdr[2];
mem[29][2] = DFFEA(mem[29][2]_lut_out, GLOBAL(clock), reset, , A1L429, , );

--A1L039Q is mem[29][2]~1385 at LC2_I43
--operation mode is normal

A1L039Q = mem[29][2];


--A1L1601 is Mux~2859 at LC7_I36
--operation mode is normal

A1L1601 = A1L0601 & (mem[29][2] # !mem_addr[3]) # !A1L0601 & (mem_addr[3] & mem[25][2]);

--A1L1441 is Mux~3260 at LC7_I36
--operation mode is normal

A1L1441 = A1L0601 & (mem[29][2] # !mem_addr[3]) # !A1L0601 & (mem_addr[3] & mem[25][2]);


--mem[20][2] is mem[20][2] at LC3_I27
--operation mode is normal

mem[20][2]_lut_out = mdr[2];
mem[20][2] = DFFEA(mem[20][2]_lut_out, GLOBAL(clock), reset, , A1L357, , );

--A1L957Q is mem[20][2]~1386 at LC3_I27
--operation mode is normal

A1L957Q = mem[20][2];


--mem[24][2] is mem[24][2] at LC4_I27
--operation mode is normal

mem[24][2]_lut_out = mdr[2];
mem[24][2] = DFFEA(mem[24][2]_lut_out, GLOBAL(clock), reset, , A1L928, , );

--A1L538Q is mem[24][2]~1387 at LC4_I27
--operation mode is normal

A1L538Q = mem[24][2];


--mem[16][2] is mem[16][2] at LC5_I27
--operation mode is normal

mem[16][2]_lut_out = mdr[2];
mem[16][2] = DFFEA(mem[16][2]_lut_out, GLOBAL(clock), reset, , A1L776, , );

--A1L386Q is mem[16][2]~1388 at LC5_I27
--operation mode is normal

A1L386Q = mem[16][2];


--A1L2601 is Mux~2860 at LC6_I27
--operation mode is normal

A1L2601 = mem_addr[3] & (mem[24][2] # mem_addr[2]) # !mem_addr[3] & mem[16][2] & (!mem_addr[2]);

--A1L2441 is Mux~3261 at LC6_I27
--operation mode is normal

A1L2441 = mem_addr[3] & (mem[24][2] # mem_addr[2]) # !mem_addr[3] & mem[16][2] & (!mem_addr[2]);


--mem[28][2] is mem[28][2] at LC7_I27
--operation mode is normal

mem[28][2]_lut_out = mdr[2];
mem[28][2] = DFFEA(mem[28][2]_lut_out, GLOBAL(clock), reset, , A1L509, , );

--A1L119Q is mem[28][2]~1389 at LC7_I27
--operation mode is normal

A1L119Q = mem[28][2];


--A1L3601 is Mux~2861 at LC2_I27
--operation mode is normal

A1L3601 = A1L2601 & (mem[28][2] # !mem_addr[2]) # !A1L2601 & (mem_addr[2] & mem[20][2]);

--A1L3441 is Mux~3262 at LC2_I27
--operation mode is normal

A1L3441 = A1L2601 & (mem[28][2] # !mem_addr[2]) # !A1L2601 & (mem_addr[2] & mem[20][2]);


--A1L4601 is Mux~2862 at LC8_I36
--operation mode is normal

A1L4601 = mem_addr[0] & (A1L1601 # mem_addr[1]) # !mem_addr[0] & A1L3601 & (!mem_addr[1]);

--A1L4441 is Mux~3263 at LC8_I36
--operation mode is normal

A1L4441 = mem_addr[0] & (A1L1601 # mem_addr[1]) # !mem_addr[0] & A1L3601 & (!mem_addr[1]);


--mem[27][2] is mem[27][2] at LC1_I24
--operation mode is normal

mem[27][2]_lut_out = mdr[2];
mem[27][2] = DFFEA(mem[27][2]_lut_out, GLOBAL(clock), reset, , A1L688, , );

--A1L298Q is mem[27][2]~1390 at LC1_I24
--operation mode is normal

A1L298Q = mem[27][2];


--mem[23][2] is mem[23][2] at LC3_I24
--operation mode is normal

mem[23][2]_lut_out = mdr[2];
mem[23][2] = DFFEA(mem[23][2]_lut_out, GLOBAL(clock), reset, , A1L018, , );

--A1L618Q is mem[23][2]~1391 at LC3_I24
--operation mode is normal

A1L618Q = mem[23][2];


--mem[19][2] is mem[19][2] at LC4_I24
--operation mode is normal

mem[19][2]_lut_out = mdr[2];
mem[19][2] = DFFEA(mem[19][2]_lut_out, GLOBAL(clock), reset, , A1L437, , );

--A1L047Q is mem[19][2]~1392 at LC4_I24
--operation mode is normal

A1L047Q = mem[19][2];


--A1L5601 is Mux~2863 at LC6_I24
--operation mode is normal

A1L5601 = mem_addr[2] & (mem[23][2] # mem_addr[3]) # !mem_addr[2] & mem[19][2] & (!mem_addr[3]);

--A1L5441 is Mux~3264 at LC6_I24
--operation mode is normal

A1L5441 = mem_addr[2] & (mem[23][2] # mem_addr[3]) # !mem_addr[2] & mem[19][2] & (!mem_addr[3]);


--mem[31][2] is mem[31][2] at LC7_I24
--operation mode is normal

mem[31][2]_lut_out = mdr[2];
mem[31][2] = DFFEA(mem[31][2]_lut_out, GLOBAL(clock), reset, , A1L269, , );

--A1L869Q is mem[31][2]~1393 at LC7_I24
--operation mode is normal

A1L869Q = mem[31][2];


--A1L6601 is Mux~2864 at LC5_I24
--operation