cpu.fit.eqn

这是接上面程序

A1L052Q = IR_out[1];


--A1L2301 is Mux~2829 at LC6_C41
--operation mode is normal

A1L2301 = A1L1301 & (IR_out[1] # !mode[0]) # !A1L1301 & (mode[0] & G1_q[1]);

--A1L9041 is Mux~3228 at LC6_C41
--operation mode is normal

A1L9041 = A1L1301 & (IR_out[1] # !mode[0]) # !A1L1301 & (mode[0] & G1_q[1]);


--A1L3301 is Mux~2830 at LC5_I33
--operation mode is normal

A1L3301 = mode[2] & (mode[1] # !A1L0301) # !mode[2] & !A1L2301;

--A1L0141 is Mux~3229 at LC5_I33
--operation mode is normal

A1L0141 = mode[2] & (mode[1] # !A1L0301) # !mode[2] & !A1L2301;

--A1L1141 is Mux~3230 at LC5_I33
--operation mode is normal

A1L1141 = mode[2] & (mode[1] # !A1L0301) # !mode[2] & !A1L2301;


--mem[21][1] is mem[21][1] at LC3_I40
--operation mode is normal

mem[21][1]_lut_out = mdr[1];
mem[21][1] = DFFEA(mem[21][1]_lut_out, GLOBAL(clock), reset, , A1L277, , );

--A1L677Q is mem[21][1]~1346 at LC3_I40
--operation mode is normal

A1L677Q = mem[21][1];


--mem[25][1] is mem[25][1] at LC4_I40
--operation mode is normal

mem[25][1]_lut_out = mdr[1];
mem[25][1] = DFFEA(mem[25][1]_lut_out, GLOBAL(clock), reset, , A1L848, , );

--A1L258Q is mem[25][1]~1347 at LC4_I40
--operation mode is normal

A1L258Q = mem[25][1];


--mem[17][1] is mem[17][1] at LC5_I40
--operation mode is normal

mem[17][1]_lut_out = mdr[1];
mem[17][1] = DFFEA(mem[17][1]_lut_out, GLOBAL(clock), reset, , A1L696, , );

--A1L007Q is mem[17][1]~1348 at LC5_I40
--operation mode is normal

A1L007Q = mem[17][1];


--A1L4301 is Mux~2831 at LC6_I40
--operation mode is normal

A1L4301 = mem_addr[3] & (mem[25][1] # mem_addr[2]) # !mem_addr[3] & mem[17][1] & (!mem_addr[2]);

--A1L2141 is Mux~3231 at LC6_I40
--operation mode is normal

A1L2141 = mem_addr[3] & (mem[25][1] # mem_addr[2]) # !mem_addr[3] & mem[17][1] & (!mem_addr[2]);


--mem[29][1] is mem[29][1] at LC7_I40
--operation mode is normal

mem[29][1]_lut_out = mdr[1];
mem[29][1] = DFFEA(mem[29][1]_lut_out, GLOBAL(clock), reset, , A1L429, , );

--A1L829Q is mem[29][1]~1349 at LC7_I40
--operation mode is normal

A1L829Q = mem[29][1];


--A1L5301 is Mux~2832 at LC2_I40
--operation mode is normal

A1L5301 = A1L4301 & (mem[29][1] # !mem_addr[2]) # !A1L4301 & (mem_addr[2] & mem[21][1]);

--A1L3141 is Mux~3232 at LC2_I40
--operation mode is normal

A1L3141 = A1L4301 & (mem[29][1] # !mem_addr[2]) # !A1L4301 & (mem_addr[2] & mem[21][1]);


--mem[26][1] is mem[26][1] at LC2_F27
--operation mode is normal

mem[26][1]_lut_out = mdr[1];
mem[26][1] = DFFEA(mem[26][1]_lut_out, GLOBAL(clock), reset, , A1L768, , );

--A1L178Q is mem[26][1]~1350 at LC2_F27
--operation mode is normal

A1L178Q = mem[26][1];


--mem[22][1] is mem[22][1] at LC3_F35
--operation mode is normal

mem[22][1]_lut_out = mdr[1];
mem[22][1] = DFFEA(mem[22][1]_lut_out, GLOBAL(clock), reset, , A1L197, , );

--A1L597Q is mem[22][1]~1351 at LC3_F35
--operation mode is normal

A1L597Q = mem[22][1];


--mem[18][1] is mem[18][1] at LC6_F27
--operation mode is normal

mem[18][1]_lut_out = mdr[1];
mem[18][1] = DFFEA(mem[18][1]_lut_out, GLOBAL(clock), reset, , A1L517, , );

--A1L917Q is mem[18][1]~1352 at LC6_F27
--operation mode is normal

A1L917Q = mem[18][1];


--A1L6301 is Mux~2833 at LC1_F35
--operation mode is normal

A1L6301 = mem_addr[2] & (mem[22][1] # mem_addr[3]) # !mem_addr[2] & mem[18][1] & (!mem_addr[3]);

--A1L4141 is Mux~3233 at LC1_F35
--operation mode is normal

A1L4141 = mem_addr[2] & (mem[22][1] # mem_addr[3]) # !mem_addr[2] & mem[18][1] & (!mem_addr[3]);


--mem[30][1] is mem[30][1] at LC4_F33
--operation mode is normal

mem[30][1]_lut_out = mdr[1];
mem[30][1] = DFFEA(mem[30][1]_lut_out, GLOBAL(clock), reset, , A1L349, , );

--A1L749Q is mem[30][1]~1353 at LC4_F33
--operation mode is normal

A1L749Q = mem[30][1];


--A1L7301 is Mux~2834 at LC2_F34
--operation mode is normal

A1L7301 = A1L6301 & (mem[30][1] # !mem_addr[3]) # !A1L6301 & (mem_addr[3] & mem[26][1]);

--A1L5141 is Mux~3234 at LC2_F34
--operation mode is normal

A1L5141 = A1L6301 & (mem[30][1] # !mem_addr[3]) # !A1L6301 & (mem_addr[3] & mem[26][1]);


--mem[24][1] is mem[24][1] at LC3_F34
--operation mode is normal

mem[24][1]_lut_out = mdr[1];
mem[24][1] = DFFEA(mem[24][1]_lut_out, GLOBAL(clock), reset, , A1L928, , );

--A1L338Q is mem[24][1]~1354 at LC3_F34
--operation mode is normal

A1L338Q = mem[24][1];


--mem[20][1] is mem[20][1] at LC5_F36
--operation mode is normal

mem[20][1]_lut_out = mdr[1];
mem[20][1] = DFFEA(mem[20][1]_lut_out, GLOBAL(clock), reset, , A1L357, , );

--A1L757Q is mem[20][1]~1355 at LC5_F36
--operation mode is normal

A1L757Q = mem[20][1];


--mem[16][1] is mem[16][1] at LC6_F36
--operation mode is normal

mem[16][1]_lut_out = mdr[1];
mem[16][1] = DFFEA(mem[16][1]_lut_out, GLOBAL(clock), reset, , A1L776, , );

--A1L186Q is mem[16][1]~1356 at LC6_F36
--operation mode is normal

A1L186Q = mem[16][1];


--A1L8301 is Mux~2835 at LC4_F36
--operation mode is normal

A1L8301 = mem_addr[2] & (mem[20][1] # mem_addr[3]) # !mem_addr[2] & mem[16][1] & (!mem_addr[3]);

--A1L6141 is Mux~3235 at LC4_F36
--operation mode is normal

A1L6141 = mem_addr[2] & (mem[20][1] # mem_addr[3]) # !mem_addr[2] & mem[16][1] & (!mem_addr[3]);


--mem[28][1] is mem[28][1] at LC4_F34
--operation mode is normal

mem[28][1]_lut_out = mdr[1];
mem[28][1] = DFFEA(mem[28][1]_lut_out, GLOBAL(clock), reset, , A1L509, , );

--A1L909Q is mem[28][1]~1357 at LC4_F34
--operation mode is normal

A1L909Q = mem[28][1];


--A1L9301 is Mux~2836 at LC7_F34
--operation mode is normal

A1L9301 = A1L8301 & (mem[28][1] # !mem_addr[3]) # !A1L8301 & (mem_addr[3] & mem[24][1]);

--A1L7141 is Mux~3236 at LC7_F34
--operation mode is normal

A1L7141 = A1L8301 & (mem[28][1] # !mem_addr[3]) # !A1L8301 & (mem_addr[3] & mem[24][1]);


--A1L0401 is Mux~2837 at LC6_F34
--operation mode is normal

A1L0401 = mem_addr[1] & (A1L7301 # mem_addr[0]) # !mem_addr[1] & A1L9301 & (!mem_addr[0]);

--A1L8141 is Mux~3237 at LC6_F34
--operation mode is normal

A1L8141 = mem_addr[1] & (A1L7301 # mem_addr[0]) # !mem_addr[1] & A1L9301 & (!mem_addr[0]);


--mem[23][1] is mem[23][1] at LC3_I30
--operation mode is normal

mem[23][1]_lut_out = mdr[1];
mem[23][1] = DFFEA(mem[23][1]_lut_out, GLOBAL(clock), reset, , A1L018, , );

--A1L418Q is mem[23][1]~1358 at LC3_I30
--operation mode is normal

A1L418Q = mem[23][1];


--mem[27][1] is mem[27][1] at LC4_I30
--operation mode is normal

mem[27][1]_lut_out = mdr[1];
mem[27][1] = DFFEA(mem[27][1]_lut_out, GLOBAL(clock), reset, , A1L688, , );

--A1L098Q is mem[27][1]~1359 at LC4_I30
--operation mode is normal

A1L098Q = mem[27][1];


--mem[19][1] is mem[19][1] at LC5_I30
--operation mode is normal

mem[19][1]_lut_out = mdr[1];
mem[19][1] = DFFEA(mem[19][1]_lut_out, GLOBAL(clock), reset, , A1L437, , );

--A1L837Q is mem[19][1]~1360 at LC5_I30
--operation mode is normal

A1L837Q = mem[19][1];


--A1L1401 is Mux~2838 at LC6_I30
--operation mode is normal

A1L1401 = mem_addr[3] & (mem[27][1] # mem_addr[2]) # !mem_addr[3] & mem[19][1] & (!mem_addr[2]);

--A1L9141 is Mux~3238 at LC6_I30
--operation mode is normal

A1L9141 = mem_addr[3] & (mem[27][1] # mem_addr[2]) # !mem_addr[3] & mem[19][1] & (!mem_addr[2]);


--mem[31][1] is mem[31][1] at LC7_I30
--operation mode is normal

mem[31][1]_lut_out = mdr[1];
mem[31][1] = DFFEA(mem[31][1]_lut_out, GLOBAL(clock), reset, , A1L269, , );

--A1L669Q is mem[31][1]~1361 at LC7_I30
--operation mode is normal

A1L669Q = mem[31][1];


--A1L2401 is Mux~2839 at LC2_I30
--operation mode is normal

A1L2401 = A1L1401 & (mem[31][1] # !mem_addr[2]) # !A1L1401 & (mem_addr[2] & mem[23][1]);

--A1L0241 is Mux~3239 at LC2_I30
--operation mode is normal

A1L0241 = A1L1401 & (mem[31][1] # !mem_addr[2]) # !A1L1401 & (mem_addr[2] & mem[23][1]);


--A1L3401 is Mux~2840 at LC1_I28
--operation mode is normal

A1L3401 = A1L0401 & (A1L2401 # !mem_addr[0]) # !A1L0401 & (mem_addr[0] & A1L5301);

--A1L1241 is Mux~3240 at LC1_I28
--operation mode is normal

A1L1241 = A1L0401 & (A1L2401 # !mem_addr[0]) # !A1L0401 & (mem_addr[0] & A1L5301);


--mem[6][1] is mem[6][1] at LC2_F37
--operation mode is normal

mem[6][1]_lut_out = mdr[1];
mem[6][1] = DFFEA(mem[6][1]_lut_out, GLOBAL(clock), reset, , A1L784, , );

--A1L194Q is mem[6][1]~1362 at LC2_F37
--operation mode is normal

A1L194Q = mem[6][1];


--mem[5][1] is mem[5][1] at LC3_F37
--operation mode is normal

mem[5][1]_lut_out = !mdr[1];
mem[5][1] = DFFEA(mem[5][1]_lut_out, GLOBAL(clock), reset, , A1L864, , );

--A1L274Q is mem[5][1]~1363 at LC3_F37
--operation mode is normal

A1L274Q = mem[5][1];


--mem[4][1] is mem[4][1] at LC4_F37
--operation mode is normal

mem[4][1]_lut_out = !mdr[1];
mem[4][1] = DFFEA(mem[4][1]_lut_out, GLOBAL(clock), reset, , A1L944, , );

--A1L354Q is mem[4][1]~1364 at LC4_F37
--operation mode is normal

A1L354Q = mem[4][1];


--A1L4401 is Mux~2841 at LC5_F37
--operation mode is normal

A1L4401 = mem_addr[0] & (mem_addr[1] # !mem[5][1]) # !mem_addr[0] & !mem[4][1] & (!mem_addr[1]);

--A1L2241 is Mux~3241 at LC5_F37
--operation mode is normal

A1L2241 = mem_addr[0] & (mem_addr[1] # !mem[5][1]) # !mem_addr[0] & !mem[4][1] & (!mem_addr[1]);


--mem[7][1] is mem[7][1] at LC6_F37
--operation mode is normal

mem[7][1]_lut_out = mdr[1];
mem[7][1] = DFFEA(mem[7][1]_lut_out, GLOBAL(clock), reset, , A1L605, , );

--A1L015Q is mem[7][1]~1365 at LC6_F37
--operation mode is normal

A1L015Q = mem[7][1];


--A1L5401 is Mux~2842 at LC1_F37
--operation mode is normal

A1L5401 = A1L4401 & (mem[7][1] # !mem_addr[1]) # !A1L4401 & (mem_addr[1] & mem[6][1]);

--A1L3241 is Mux~3242 at LC1_F37
--operation mode is normal

A1L3241 = A1L4401 & (mem[7][1] # !mem_addr[1]) # !A1L4401 & (mem_addr[1] & mem[6][1]);


--mem[9][1] is mem[9][1] at LC3_F51
--operation mode is normal

mem[9][1]_lut_out = mdr[1];
mem[9][1] = DFFEA(mem[9][1]_lut_out, GLOBAL(clock), reset, , A1L445, , );

--A1L845Q is mem[9][1]~1366 at LC3_F51
--operation mode is normal

A1L845Q = mem[9][1];


--mem[10][1] is mem[10][1] at LC4_F51
--operation mode is normal

mem[10][1]_lut_out = mdr[1];
mem[10][1] = DFFEA(mem[10][1]_lut_out, GLOBAL(clock), reset, , A1L365, , );

--A1L765Q is mem[10][1]~1367 at LC4_F51
--operation mode is normal

A1L765Q = mem[10][1];


--mem[8][1] is mem[8][1] at LC5_F51
--operation mode is normal

mem[8][1]_lut_out = mdr[1];
mem[8][1] = DFFEA(mem[8][1]_lut_out, GLOBAL(clock), reset, , A1L525, , );

--A1L925Q is mem[8][1]~1368 at LC5_F51
--operation mode is normal

A1L925Q = mem[8][1];


--A1L6401 is Mux~2843 at LC6_F51
--operation mode is normal

A1L6401 = mem_addr[1] & (mem[10][1] # mem_addr[0]) # !mem_addr[1] & mem[8][1] & (!mem_addr[0]);

--A1L4241 is Mux~3243 at LC6_F51
--operation mode is normal

A1L4241 = mem_addr[1] & (mem[10][1] # mem_addr[0]) # !mem_addr[1] & mem[8][1] & (!mem_addr[0]);


--mem[11][1] is mem[11][1] at LC3_F33
--operation mode is normal

mem[11][1]_lut_out = mdr[1];
mem[11][1] = DFFEA(mem[11][1]_lut_out, GLOBAL(clock), reset, , A1L285, , );

--A1L685Q is mem[11][1]~1369 at LC3_F33
--operation mode is normal

A1L685Q = mem[11][1];


--A1L7401 is Mux~2844 at LC2_F51
--operation mode is normal

A1L7401 = A1L6401 & (mem[11][1] # !mem_addr[0]) # !A1L6401 & (mem_addr[0] & mem[9][1]);

--A1L5241 is Mux~3244 at LC2_F51
--operation mode is normal

A1L5241 = A1L6401 & (mem[11][1] # !mem_addr[0]) # !A1L6401 & (mem_addr[0] & mem[9][1]);


--mem[1][1] is mem[1][1] at LC1_F49
--operation mode is normal

mem[1][1]_lut_out = mdr[1];
mem[1][1] = DFFEA(mem[1][1]_lut_out, GLOBAL(clock), reset, , A1L293, , );

--A1L693Q is mem[1][1]~1370 at LC1_F49
--operation mode is normal

A1L693Q = mem[1][1];


--mem[2][1] is mem[2][1] at LC3_F49
--operation mode is normal

mem[2][1]_lut_out = !mdr[1];
mem[2][1] = DFFEA(mem[2][1]_lut_out, GLOBAL(clock), reset, , A1L114, , );

--A1L514Q is mem[2][1]~1371 at LC3_F49
--operation mode is normal

A1L514Q = mem[2][1];


--mem[0][1] is mem[0][1] at LC4_F49
--operation mode is normal

mem[0][1]_lut_out = mdr[1];
mem[0][1] = DFFEA(mem[0][1]_lut_out, GLOBAL(clock), reset, , A1L373, , );

--A1L773Q is mem[0][1]~1372 at LC4_F49
--operation mode is normal

A1L773Q = mem[0][1];


--A1L8401 is Mux~2845 at LC6_F49
--operation mode is normal

A1L8401 = mem_addr[1] & (mem_addr[0] # !mem[2][1]) # !mem_addr[1] & mem[0][1] & (!mem_addr[0]);

--A1L6241 is Mux~3245 at LC6_F49
--operation mode is normal

A1L6241 = mem_addr[1] & (mem_addr[0] # !mem[2][1]) # !mem_addr[1] & mem[0][1] & (!mem_addr[0]);


--mem[3][1] is mem[3][1] at LC7_F49
--operation mode is normal

mem[3][1]_lut_out = !mdr[1];
mem[3][1] = DFFEA(mem[3][1]_lut_out, GLOBAL(clock), reset, , A1L034, , );

--A1L434Q is mem[3][1]~1373 at LC7_F49