cpu.fit.eqn

这是接上面程序

--operation mode is normal

A1L9831 = A1L2101 & (mem[28][0] # !mem_addr[2]) # !A1L2101 & (mem_addr[2] & mem[20][0]);


--A1L4101 is Mux~2810 at LC7_B43
--operation mode is normal

A1L4101 = mem_addr[0] & (A1L1101 # mem_addr[1]) # !mem_addr[0] & A1L3101 & (!mem_addr[1]);

--A1L0931 is Mux~3209 at LC7_B43
--operation mode is normal

A1L0931 = mem_addr[0] & (A1L1101 # mem_addr[1]) # !mem_addr[0] & A1L3101 & (!mem_addr[1]);


--mem[27][0] is mem[27][0] at LC1_B31
--operation mode is normal

mem[27][0]_lut_out = mdr[0];
mem[27][0] = DFFEA(mem[27][0]_lut_out, GLOBAL(clock), reset, , A1L688, , );

--A1L788Q is mem[27][0]~1326 at LC1_B31
--operation mode is normal

A1L788Q = mem[27][0];


--mem[23][0] is mem[23][0] at LC3_B31
--operation mode is normal

mem[23][0]_lut_out = mdr[0];
mem[23][0] = DFFEA(mem[23][0]_lut_out, GLOBAL(clock), reset, , A1L018, , );

--A1L118Q is mem[23][0]~1327 at LC3_B31
--operation mode is normal

A1L118Q = mem[23][0];


--mem[19][0] is mem[19][0] at LC4_B31
--operation mode is normal

mem[19][0]_lut_out = mdr[0];
mem[19][0] = DFFEA(mem[19][0]_lut_out, GLOBAL(clock), reset, , A1L437, , );

--A1L537Q is mem[19][0]~1328 at LC4_B31
--operation mode is normal

A1L537Q = mem[19][0];


--A1L5101 is Mux~2811 at LC5_B31
--operation mode is normal

A1L5101 = mem_addr[2] & (mem[23][0] # mem_addr[3]) # !mem_addr[2] & mem[19][0] & (!mem_addr[3]);

--A1L1931 is Mux~3210 at LC5_B31
--operation mode is normal

A1L1931 = mem_addr[2] & (mem[23][0] # mem_addr[3]) # !mem_addr[2] & mem[19][0] & (!mem_addr[3]);


--mem[31][0] is mem[31][0] at LC6_B31
--operation mode is normal

mem[31][0]_lut_out = mdr[0];
mem[31][0] = DFFEA(mem[31][0]_lut_out, GLOBAL(clock), reset, , A1L269, , );

--A1L369Q is mem[31][0]~1329 at LC6_B31
--operation mode is normal

A1L369Q = mem[31][0];


--A1L6101 is Mux~2812 at LC2_B31
--operation mode is normal

A1L6101 = A1L5101 & (mem[31][0] # !mem_addr[3]) # !A1L5101 & (mem_addr[3] & mem[27][0]);

--A1L2931 is Mux~3211 at LC2_B31
--operation mode is normal

A1L2931 = A1L5101 & (mem[31][0] # !mem_addr[3]) # !A1L5101 & (mem_addr[3] & mem[27][0]);


--A1L7101 is Mux~2813 at LC8_B43
--operation mode is normal

A1L7101 = A1L4101 & (A1L6101 # !mem_addr[1]) # !A1L4101 & (mem_addr[1] & A1L9001);

--A1L3931 is Mux~3212 at LC8_B43
--operation mode is normal

A1L3931 = A1L4101 & (A1L6101 # !mem_addr[1]) # !A1L4101 & (mem_addr[1] & A1L9001);


--A1L8101 is Mux~2814 at LC6_F50
--operation mode is normal

A1L8101 = !mode[0] & mode[1] & mode[2] & mem_addr[4];

--A1L4931 is Mux~3213 at LC6_F50
--operation mode is normal

A1L4931 = !mode[0] & mode[1] & mode[2] & mem_addr[4];


--mem[10][0] is mem[10][0] at LC1_B41
--operation mode is normal

mem[10][0]_lut_out = mdr[0];
mem[10][0] = DFFEA(mem[10][0]_lut_out, GLOBAL(clock), reset, , A1L365, , );

--A1L465Q is mem[10][0]~1330 at LC1_B41
--operation mode is normal

A1L465Q = mem[10][0];


--mem[9][0] is mem[9][0] at LC3_B41
--operation mode is normal

mem[9][0]_lut_out = mdr[0];
mem[9][0] = DFFEA(mem[9][0]_lut_out, GLOBAL(clock), reset, , A1L445, , );

--A1L545Q is mem[9][0]~1331 at LC3_B41
--operation mode is normal

A1L545Q = mem[9][0];


--mem[8][0] is mem[8][0] at LC4_B41
--operation mode is normal

mem[8][0]_lut_out = mdr[0];
mem[8][0] = DFFEA(mem[8][0]_lut_out, GLOBAL(clock), reset, , A1L525, , );

--A1L625Q is mem[8][0]~1332 at LC4_B41
--operation mode is normal

A1L625Q = mem[8][0];


--A1L9101 is Mux~2815 at LC5_B41
--operation mode is normal

A1L9101 = mem_addr[0] & (mem[9][0] # mem_addr[1]) # !mem_addr[0] & mem[8][0] & (!mem_addr[1]);

--A1L5931 is Mux~3214 at LC5_B41
--operation mode is normal

A1L5931 = mem_addr[0] & (mem[9][0] # mem_addr[1]) # !mem_addr[0] & mem[8][0] & (!mem_addr[1]);


--mem[11][0] is mem[11][0] at LC6_B41
--operation mode is normal

mem[11][0]_lut_out = mdr[0];
mem[11][0] = DFFEA(mem[11][0]_lut_out, GLOBAL(clock), reset, , A1L285, , );

--A1L385Q is mem[11][0]~1333 at LC6_B41
--operation mode is normal

A1L385Q = mem[11][0];


--A1L0201 is Mux~2816 at LC8_B41
--operation mode is normal

A1L0201 = A1L9101 & (mem[11][0] # !mem_addr[1]) # !A1L9101 & (mem_addr[1] & mem[10][0]);

--A1L6931 is Mux~3215 at LC8_B41
--operation mode is normal

A1L6931 = A1L9101 & (mem[11][0] # !mem_addr[1]) # !A1L9101 & (mem_addr[1] & mem[10][0]);


--mem[5][0] is mem[5][0] at LC3_B42
--operation mode is normal

mem[5][0]_lut_out = !mdr[0];
mem[5][0] = DFFEA(mem[5][0]_lut_out, GLOBAL(clock), reset, , A1L864, , );

--A1L964Q is mem[5][0]~1334 at LC3_B42
--operation mode is normal

A1L964Q = mem[5][0];


--mem[6][0] is mem[6][0] at LC4_B42
--operation mode is normal

mem[6][0]_lut_out = mdr[0];
mem[6][0] = DFFEA(mem[6][0]_lut_out, GLOBAL(clock), reset, , A1L784, , );

--A1L884Q is mem[6][0]~1335 at LC4_B42
--operation mode is normal

A1L884Q = mem[6][0];


--mem[4][0] is mem[4][0] at LC5_B42
--operation mode is normal

mem[4][0]_lut_out = mdr[0];
mem[4][0] = DFFEA(mem[4][0]_lut_out, GLOBAL(clock), reset, , A1L944, , );

--A1L054Q is mem[4][0]~1336 at LC5_B42
--operation mode is normal

A1L054Q = mem[4][0];


--A1L1201 is Mux~2817 at LC6_B42
--operation mode is normal

A1L1201 = mem_addr[1] & (mem[6][0] # mem_addr[0]) # !mem_addr[1] & mem[4][0] & (!mem_addr[0]);

--A1L7931 is Mux~3216 at LC6_B42
--operation mode is normal

A1L7931 = mem_addr[1] & (mem[6][0] # mem_addr[0]) # !mem_addr[1] & mem[4][0] & (!mem_addr[0]);


--mem[7][0] is mem[7][0] at LC7_B42
--operation mode is normal

mem[7][0]_lut_out = mdr[0];
mem[7][0] = DFFEA(mem[7][0]_lut_out, GLOBAL(clock), reset, , A1L605, , );

--A1L705Q is mem[7][0]~1337 at LC7_B42
--operation mode is normal

A1L705Q = mem[7][0];


--A1L2201 is Mux~2818 at LC1_B42
--operation mode is normal

A1L2201 = A1L1201 & (mem[7][0] # !mem_addr[0]) # !A1L1201 & (mem_addr[0] & !mem[5][0]);

--A1L8931 is Mux~3217 at LC1_B42
--operation mode is normal

A1L8931 = A1L1201 & (mem[7][0] # !mem_addr[0]) # !A1L1201 & (mem_addr[0] & !mem[5][0]);


--mem[2][0] is mem[2][0] at LC2_F44
--operation mode is normal

mem[2][0]_lut_out = mdr[0];
mem[2][0] = DFFEA(mem[2][0]_lut_out, GLOBAL(clock), reset, , A1L114, , );

--A1L214Q is mem[2][0]~1338 at LC2_F44
--operation mode is normal

A1L214Q = mem[2][0];


--mem[1][0] is mem[1][0] at LC3_B44
--operation mode is normal

mem[1][0]_lut_out = !mdr[0];
mem[1][0] = DFFEA(mem[1][0]_lut_out, GLOBAL(clock), reset, , A1L293, , );

--A1L393Q is mem[1][0]~1339 at LC3_B44
--operation mode is normal

A1L393Q = mem[1][0];


--mem[0][0] is mem[0][0] at LC4_B44
--operation mode is normal

mem[0][0]_lut_out = mdr[0];
mem[0][0] = DFFEA(mem[0][0]_lut_out, GLOBAL(clock), reset, , A1L373, , );

--A1L473Q is mem[0][0]~1340 at LC4_B44
--operation mode is normal

A1L473Q = mem[0][0];


--A1L3201 is Mux~2819 at LC6_B44
--operation mode is normal

A1L3201 = mem_addr[0] & (mem_addr[1] # !mem[1][0]) # !mem_addr[0] & mem[0][0] & (!mem_addr[1]);

--A1L9931 is Mux~3218 at LC6_B44
--operation mode is normal

A1L9931 = mem_addr[0] & (mem_addr[1] # !mem[1][0]) # !mem_addr[0] & mem[0][0] & (!mem_addr[1]);


--mem[3][0] is mem[3][0] at LC3_F46
--operation mode is normal

mem[3][0]_lut_out = !mdr[0];
mem[3][0] = DFFEA(mem[3][0]_lut_out, GLOBAL(clock), reset, , A1L034, , );

--A1L134Q is mem[3][0]~1341 at LC3_F46
--operation mode is normal

A1L134Q = mem[3][0];


--A1L4201 is Mux~2820 at LC7_B44
--operation mode is normal

A1L4201 = A1L3201 & (!mem_addr[1] # !mem[3][0]) # !A1L3201 & (mem_addr[1] & mem[2][0]);

--A1L0041 is Mux~3219 at LC7_B44
--operation mode is normal

A1L0041 = A1L3201 & (!mem_addr[1] # !mem[3][0]) # !A1L3201 & (mem_addr[1] & mem[2][0]);


--A1L5201 is Mux~2821 at LC8_B44
--operation mode is normal

A1L5201 = mem_addr[2] & (A1L2201 # mem_addr[3]) # !mem_addr[2] & A1L4201 & (!mem_addr[3]);

--A1L1041 is Mux~3220 at LC8_B44
--operation mode is normal

A1L1041 = mem_addr[2] & (A1L2201 # mem_addr[3]) # !mem_addr[2] & A1L4201 & (!mem_addr[3]);


--mem[13][0] is mem[13][0] at LC3_B48
--operation mode is normal

mem[13][0]_lut_out = mdr[0];
mem[13][0] = DFFEA(mem[13][0]_lut_out, GLOBAL(clock), reset, , A1L026, , );

--A1L126Q is mem[13][0]~1342 at LC3_B48
--operation mode is normal

A1L126Q = mem[13][0];


--mem[14][0] is mem[14][0] at LC4_B48
--operation mode is normal

mem[14][0]_lut_out = mdr[0];
mem[14][0] = DFFEA(mem[14][0]_lut_out, GLOBAL(clock), reset, , A1L936, , );

--A1L046Q is mem[14][0]~1343 at LC4_B48
--operation mode is normal

A1L046Q = mem[14][0];


--mem[12][0] is mem[12][0] at LC5_B48
--operation mode is normal

mem[12][0]_lut_out = mdr[0];
mem[12][0] = DFFEA(mem[12][0]_lut_out, GLOBAL(clock), reset, , A1L106, , );

--A1L206Q is mem[12][0]~1344 at LC5_B48
--operation mode is normal

A1L206Q = mem[12][0];


--A1L6201 is Mux~2822 at LC6_B48
--operation mode is normal

A1L6201 = mem_addr[1] & (mem[14][0] # mem_addr[0]) # !mem_addr[1] & mem[12][0] & (!mem_addr[0]);

--A1L2041 is Mux~3221 at LC6_B48
--operation mode is normal

A1L2041 = mem_addr[1] & (mem[14][0] # mem_addr[0]) # !mem_addr[1] & mem[12][0] & (!mem_addr[0]);


--mem[15][0] is mem[15][0] at LC7_B48
--operation mode is normal

mem[15][0]_lut_out = mdr[0];
mem[15][0] = DFFEA(mem[15][0]_lut_out, GLOBAL(clock), reset, , A1L856, , );

--A1L956Q is mem[15][0]~1345 at LC7_B48
--operation mode is normal

A1L956Q = mem[15][0];


--A1L7201 is Mux~2823 at LC2_B48
--operation mode is normal

A1L7201 = A1L6201 & (mem[15][0] # !mem_addr[0]) # !A1L6201 & (mem_addr[0] & mem[13][0]);

--A1L3041 is Mux~3222 at LC2_B48
--operation mode is normal

A1L3041 = A1L6201 & (mem[15][0] # !mem_addr[0]) # !A1L6201 & (mem_addr[0] & mem[13][0]);


--A1L8201 is Mux~2824 at LC5_B44
--operation mode is normal

A1L8201 = A1L5201 & (A1L7201 # !mem_addr[3]) # !A1L5201 & (mem_addr[3] & A1L0201);

--A1L4041 is Mux~3223 at LC5_B44
--operation mode is normal

A1L4041 = A1L5201 & (A1L7201 # !mem_addr[3]) # !A1L5201 & (mem_addr[3] & A1L0201);


--A1L9201 is Mux~2825 at LC7_C49
--operation mode is normal

A1L9201 = !mode[0] & !mem_addr[4] & mode[1] & mode[2];

--A1L5041 is Mux~3224 at LC7_C49
--operation mode is normal

A1L5041 = !mode[0] & !mem_addr[4] & mode[1] & mode[2];


--A1L6531 is Mux~3167 at LC4_B43
--operation mode is normal

A1L6531 = (A1L9201 & !A1L8201 & (!A1L7101 # !A1L8101) # !A1L9201 & (!A1L7101 # !A1L8101)) & CASCADE(A1L3831);

--A1L6041 is Mux~3225 at LC4_B43
--operation mode is normal

A1L6041 = (A1L9201 & !A1L8201 & (!A1L7101 # !A1L8101) # !A1L9201 & (!A1L7101 # !A1L8101)) & CASCADE(A1L3831);


--mdr_out[1] is mdr_out[1] at LC6_F41
--operation mode is normal

mdr_out[1]_lut_out = A1L533;
mdr_out[1] = DFFEA(mdr_out[1]_lut_out, GLOBAL(clock), , , reset, , );

--A1L603Q is mdr_out[1]~41 at LC6_F41
--operation mode is normal

A1L603Q = mdr_out[1];


--mar_out[1] is mar_out[1] at LC8_F41
--operation mode is normal

mar_out[1]_lut_out = A1L699 & mar[1] # !A1L699 & (A1L4081);
mar_out[1] = DFFEA(mar_out[1]_lut_out, GLOBAL(clock), , , reset, , );

--A1L872Q is mar_out[1]~36 at LC8_F41
--operation mode is normal

A1L872Q = mar_out[1];


--A1L0301 is Mux~2827 at LC1_I33
--operation mode is normal

A1L0301 = mode[0] & (mdr_out[1]) # !mode[0] & mar_out[1];

--A1L7041 is Mux~3226 at LC1_I33
--operation mode is normal

A1L7041 = mode[0] & (mdr_out[1]) # !mode[0] & mar_out[1];


--G1_q[1] is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[1] at LC3_C12
--operation mode is clrb_cntr

G1_q[1]_lut_out = ((G1_q[1] $ (A1L0001 & G1L3) & A1L391) # (mdr[1] & !A1L391)) & VCC;
G1_q[1] = DFFEA(G1_q[1]_lut_out, GLOBAL(clock), reset, , , , );

--G1L51Q is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[1]~1 at LC3_C12
--operation mode is clrb_cntr

G1L51Q = G1_q[1];

--G1L5 is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT at LC3_C12
--operation mode is clrb_cntr

G1L5 = CARRY(G1_q[1] & (G1L3));


--acc_out[1] is acc_out[1] at LC2_C41
--operation mode is normal

acc_out[1]_lut_out = A1L94 # A1L05 & A1L071;
acc_out[1] = DFFEA(acc_out[1]_lut_out, GLOBAL(clock), , , reset, , );

--A1L42Q is acc_out[1]~73 at LC2_C41
--operation mode is normal

A1L42Q = acc_out[1];


--sysbus[1] is sysbus[1] at LC3_F41
--operation mode is normal

sysbus[1]_lut_out = A1L599 & (A1L533) # !A1L599 & A1L4081;
sysbus[1] = DFFEA(sysbus[1]_lut_out, GLOBAL(clock), reset, , , , );

--A1L6871Q is sysbus[1]~2666 at LC3_F41
--operation mode is normal

A1L6871Q = sysbus[1];


--A1L1301 is Mux~2828 at LC3_C41
--operation mode is normal

A1L1301 = mode[1] & (acc_out[1] # mode[0]) # !mode[1] & sysbus[1] & (!mode[0]);

--A1L8041 is Mux~3227 at LC3_C41
--operation mode is normal

A1L8041 = mode[1] & (acc_out[1] # mode[0]) # !mode[1] & sysbus[1] & (!mode[0]);


--IR_out[1] is IR_out[1] at LC5_C52
--operation mode is normal

IR_out[1]_lut_out = A1L2001 & mdr[1] # !A1L2001 & (instr_reg[1]);
IR_out[1] = DFFEA(IR_out[1]_lut_out, GLOBAL(clock), , , reset, , );

--A1L052Q is IR_out[1]~44 at LC5_C52
--operation mode is normal