cpu.map.eqn

说明：cpuyuanma1是硬布线控制器源代码

--mem[22][1] is mem[22][1]
--operation mode is normal

mem[22][1]_lut_out = mdr[1];
mem[22][1] = DFFEA(mem[22][1]_lut_out, clock, reset, , A1L907, , );

--A1L317Q is mem[22][1]~855
--operation mode is normal

A1L317Q = mem[22][1];


--mem[18][1] is mem[18][1]
--operation mode is normal

mem[18][1]_lut_out = mdr[1];
mem[18][1] = DFFEA(mem[18][1]_lut_out, clock, reset, , A1L336, , );

--A1L736Q is mem[18][1]~856
--operation mode is normal

A1L736Q = mem[18][1];


--A1L939 is Mux~1905
--operation mode is normal

A1L939 = mar[3] & (mar[2]) # !mar[3] & (mar[2] & mem[22][1] # !mar[2] & (mem[18][1]));

--A1L8921 is Mux~2300
--operation mode is normal

A1L8921 = mar[3] & (mar[2]) # !mar[3] & (mar[2] & mem[22][1] # !mar[2] & (mem[18][1]));


--mem[30][1] is mem[30][1]
--operation mode is normal

mem[30][1]_lut_out = mdr[1];
mem[30][1] = DFFEA(mem[30][1]_lut_out, clock, reset, , A1L168, , );

--A1L568Q is mem[30][1]~857
--operation mode is normal

A1L568Q = mem[30][1];


--A1L049 is Mux~1906
--operation mode is normal

A1L049 = mar[3] & (A1L939 & (mem[30][1]) # !A1L939 & mem[26][1]) # !mar[3] & (A1L939);

--A1L9921 is Mux~2301
--operation mode is normal

A1L9921 = mar[3] & (A1L939 & (mem[30][1]) # !A1L939 & mem[26][1]) # !mar[3] & (A1L939);


--mem[24][1] is mem[24][1]
--operation mode is normal

mem[24][1]_lut_out = mdr[1];
mem[24][1] = DFFEA(mem[24][1]_lut_out, clock, reset, , A1L747, , );

--A1L157Q is mem[24][1]~858
--operation mode is normal

A1L157Q = mem[24][1];


--mem[20][1] is mem[20][1]
--operation mode is normal

mem[20][1]_lut_out = mdr[1];
mem[20][1] = DFFEA(mem[20][1]_lut_out, clock, reset, , A1L176, , );

--A1L576Q is mem[20][1]~859
--operation mode is normal

A1L576Q = mem[20][1];


--mem[16][1] is mem[16][1]
--operation mode is normal

mem[16][1]_lut_out = mdr[1];
mem[16][1] = DFFEA(mem[16][1]_lut_out, clock, reset, , A1L595, , );

--A1L995Q is mem[16][1]~860
--operation mode is normal

A1L995Q = mem[16][1];


--A1L149 is Mux~1907
--operation mode is normal

A1L149 = mar[3] & (mar[2]) # !mar[3] & (mar[2] & mem[20][1] # !mar[2] & (mem[16][1]));

--A1L0031 is Mux~2302
--operation mode is normal

A1L0031 = mar[3] & (mar[2]) # !mar[3] & (mar[2] & mem[20][1] # !mar[2] & (mem[16][1]));


--mem[28][1] is mem[28][1]
--operation mode is normal

mem[28][1]_lut_out = mdr[1];
mem[28][1] = DFFEA(mem[28][1]_lut_out, clock, reset, , A1L328, , );

--A1L728Q is mem[28][1]~861
--operation mode is normal

A1L728Q = mem[28][1];


--A1L249 is Mux~1908
--operation mode is normal

A1L249 = mar[3] & (A1L149 & (mem[28][1]) # !A1L149 & mem[24][1]) # !mar[3] & (A1L149);

--A1L1031 is Mux~2303
--operation mode is normal

A1L1031 = mar[3] & (A1L149 & (mem[28][1]) # !A1L149 & mem[24][1]) # !mar[3] & (A1L149);


--A1L349 is Mux~1909
--operation mode is normal

A1L349 = mar[0] & (mar[1]) # !mar[0] & (mar[1] & A1L049 # !mar[1] & (A1L249));

--A1L2031 is Mux~2304
--operation mode is normal

A1L2031 = mar[0] & (mar[1]) # !mar[0] & (mar[1] & A1L049 # !mar[1] & (A1L249));


--mem[23][1] is mem[23][1]
--operation mode is normal

mem[23][1]_lut_out = mdr[1];
mem[23][1] = DFFEA(mem[23][1]_lut_out, clock, reset, , A1L827, , );

--A1L237Q is mem[23][1]~862
--operation mode is normal

A1L237Q = mem[23][1];


--mem[27][1] is mem[27][1]
--operation mode is normal

mem[27][1]_lut_out = mdr[1];
mem[27][1] = DFFEA(mem[27][1]_lut_out, clock, reset, , A1L408, , );

--A1L808Q is mem[27][1]~863
--operation mode is normal

A1L808Q = mem[27][1];


--mem[19][1] is mem[19][1]
--operation mode is normal

mem[19][1]_lut_out = mdr[1];
mem[19][1] = DFFEA(mem[19][1]_lut_out, clock, reset, , A1L256, , );

--A1L656Q is mem[19][1]~864
--operation mode is normal

A1L656Q = mem[19][1];


--A1L449 is Mux~1910
--operation mode is normal

A1L449 = mar[2] & (mar[3]) # !mar[2] & (mar[3] & mem[27][1] # !mar[3] & (mem[19][1]));

--A1L3031 is Mux~2305
--operation mode is normal

A1L3031 = mar[2] & (mar[3]) # !mar[2] & (mar[3] & mem[27][1] # !mar[3] & (mem[19][1]));


--mem[31][1] is mem[31][1]
--operation mode is normal

mem[31][1]_lut_out = mdr[1];
mem[31][1] = DFFEA(mem[31][1]_lut_out, clock, reset, , A1L088, , );

--A1L488Q is mem[31][1]~865
--operation mode is normal

A1L488Q = mem[31][1];


--A1L549 is Mux~1911
--operation mode is normal

A1L549 = mar[2] & (A1L449 & (mem[31][1]) # !A1L449 & mem[23][1]) # !mar[2] & (A1L449);

--A1L4031 is Mux~2306
--operation mode is normal

A1L4031 = mar[2] & (A1L449 & (mem[31][1]) # !A1L449 & mem[23][1]) # !mar[2] & (A1L449);


--A1L649 is Mux~1912
--operation mode is normal

A1L649 = mar[0] & (A1L349 & (A1L549) # !A1L349 & A1L839) # !mar[0] & (A1L349);

--A1L5031 is Mux~2307
--operation mode is normal

A1L5031 = mar[0] & (A1L349 & (A1L549) # !A1L349 & A1L839) # !mar[0] & (A1L349);


--A1L242 is mdr~2405
--operation mode is normal

A1L242 = A1L142 # A1L832 & A1L649;

--A1L962 is mdr~2442
--operation mode is normal

A1L962 = A1L142 # A1L832 & A1L649;


--acc[1] is acc[1]
--operation mode is normal

acc[1]_lut_out = A1L14 # present_state.s8 & A1L24;
acc[1] = DFFEA(acc[1]_lut_out, clock, reset, , , , );

--A1L7Q is acc[1]~1815
--operation mode is normal

A1L7Q = acc[1];


--A1L14 is acc~1775
--operation mode is normal

A1L14 = !A1L601 & (present_state.s7 & mdr[1] # !present_state.s7 & (acc[1]));

--A1L27 is acc~1816
--operation mode is normal

A1L27 = !A1L601 & (present_state.s7 & mdr[1] # !present_state.s7 & (acc[1]));


--F3_cs_buffer[1] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

F3_cs_buffer[1] = mdr[1] $ A1L36 $ F3_cout[0];

--F3L31 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~137
--operation mode is arithmetic

F3L31 = mdr[1] $ A1L36 $ F3_cout[0];

--F3_cout[1] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

F3_cout[1] = CARRY(mdr[1] & (A1L36 # F3_cout[0]) # !mdr[1] & A1L36 & F3_cout[0]);


--F6_cs_buffer[2] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

F6_cs_buffer[2] = mdr[1] $ A1L36 $ F6_cout[1];

--F6L31 is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~137
--operation mode is arithmetic

F6L31 = mdr[1] $ A1L36 $ F6_cout[1];

--F6_cout[2] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

F6_cout[2] = CARRY(mdr[1] & A1L36 & F6_cout[1] # !mdr[1] & (A1L36 # F6_cout[1]));


--A1L24 is acc~1776
--operation mode is normal

A1L24 = A1L301 & F3_cs_buffer[1] # !A1L301 & (A1L701 & !F6_cs_buffer[2]);

--A1L37 is acc~1817
--operation mode is normal

A1L37 = A1L301 & F3_cs_buffer[1] # !A1L301 & (A1L701 & !F6_cs_buffer[2]);


--A1L34 is acc~1777
--operation mode is normal

A1L34 = A1L14 # present_state.s8 & A1L24;

--A1L47 is acc~1818
--operation mode is normal

A1L47 = A1L14 # present_state.s8 & A1L24;


--instr_reg[1] is instr_reg[1]
--operation mode is normal

instr_reg[1]_lut_out = present_state.s2 & mdr[1] # !present_state.s2 & (instr_reg[1]);
instr_reg[1] = DFFEA(instr_reg[1]_lut_out, clock, reset, , , , );

--A1L941Q is instr_reg[1]~48
--operation mode is normal

A1L941Q = instr_reg[1];


--A1L3371 is sysbus~2732
--operation mode is normal

A1L3371 = present_state.s3 & (present_state.s2 & mdr[1] # !present_state.s2 & (instr_reg[1]));

--A1L2571 is sysbus~2766
--operation mode is normal

A1L2571 = present_state.s3 & (present_state.s2 & mdr[1] # !present_state.s2 & (instr_reg[1]));


--G1_q[1] is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is clrb_cntr

G1_q[1]_lut_out = ((G1_q[1] $ (!present_state.s0 & G1L3) & A1L4761) # (mdr[1] & !A1L4761)) & VCC;
G1_q[1] = DFFEA(G1_q[1]_lut_out, clock, reset, , , , );

--G1L51Q is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[1]~1
--operation mode is clrb_cntr

G1L51Q = G1_q[1];

--G1L5 is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is clrb_cntr

G1L5 = CARRY(G1_q[1] & (G1L3));


--A1L4371 is sysbus~2733
--operation mode is normal

A1L4371 = !present_state.s3 & (present_state.s0 & sysbus[1] # !present_state.s0 & (G1_q[1]));

--A1L3571 is sysbus~2767
--operation mode is normal

A1L3571 = !present_state.s3 & (present_state.s0 & sysbus[1] # !present_state.s0 & (G1_q[1]));


--A1L5371 is sysbus~2734
--operation mode is normal

A1L5371 = present_state.s4 & A1L34 # !present_state.s4 & (A1L3371 # A1L4371);

--A1L4571 is sysbus~2768
--operation mode is normal

A1L4571 = present_state.s4 & A1L34 # !present_state.s4 & (A1L3371 # A1L4371);


--A1L342 is mdr~2406
--operation mode is normal

A1L342 = A1L242 # present_state.s4 & A1L5371 & !A1L9271;

--A1L072 is mdr~2443
--operation mode is normal

A1L072 = A1L242 # present_state.s4 & A1L5371 & !A1L9271;


--mdr[2] is mdr[2]
--operation mode is normal

mdr[2]_lut_out = A1L542 # present_state.s4 & A1L8371 & !A1L9271;
mdr[2] = DFFEA(mdr[2]_lut_out, clock, reset, , , , );

--A1L602Q is mdr[2]~2444
--operation mode is normal

A1L602Q = mdr[2];


--mem[10][2] is mem[10][2]
--operation mode is normal

mem[10][2]_lut_out = mdr[2];
mem[10][2] = DFFEA(mem[10][2]_lut_out, clock, reset, , A1L184, , );

--A1L784Q is mem[10][2]~866
--operation mode is normal

A1L784Q = mem[10][2];


--mem[9][2] is mem[9][2]
--operation mode is normal

mem[9][2]_lut_out = mdr[2];
mem[9][2] = DFFEA(mem[9][2]_lut_out, clock, reset, , A1L264, , );

--A1L864Q is mem[9][2]~867
--operation mode is normal

A1L864Q = mem[9][2];


--mem[8][2] is mem[8][2]
--operation mode is normal

mem[8][2]_lut_out = mdr[2];
mem[8][2] = DFFEA(mem[8][2]_lut_out, clock, reset, , A1L344, , );

--A1L944Q is mem[8][2]~868
--operation mode is normal

A1L944Q = mem[8][2];


--A1L749 is Mux~1913
--operation mode is normal

A1L749 = mar[1] & (mar[0]) # !mar[1] & (mar[0] & mem[9][2] # !mar[0] & (mem[8][2]));

--A1L6031 is Mux~2308
--operation mode is normal

A1L6031 = mar[1] & (mar[0]) # !mar[1] & (mar[0] & mem[9][2] # !mar[0] & (mem[8][2]));


--mem[11][2] is mem[11][2]
--operation mode is normal

mem[11][2]_lut_out = mdr[2];
mem[11][2] = DFFEA(mem[11][2]_lut_out, clock, reset, , A1L005, , );

--A1L605Q is mem[11][2]~869
--operation mode is normal

A1L605Q = mem[11][2];


--A1L849 is Mux~1914
--operation mode is normal

A1L849 = mar[1] & (A1L749 & (mem[11][2]) # !A1L749 & mem[10][2]) # !mar[1] & (A1L749);

--A1L7031 is Mux~2309
--operation mode is normal

A1L7031 = mar[1] & (A1L749 & (mem[11][2]) # !A1L749 & mem[10][2]) # !mar[1] & (A1L749);


--mem[5][2] is mem[5][2]
--operation mode is normal

mem[5][2]_lut_out = mdr[2];
mem[5][2] = DFFEA(mem[5][2]_lut_out, clock, reset, , A1L683, , );

--A1L293Q is mem[5][2]~870
--operation mode is normal

A1L293Q = mem[5][2];


--mem[6][2] is mem[6][2]
--operation mode is normal

mem[6][2]_lut_out = mdr[2];
mem[6][2] = DFFEA(mem[6][2]_lut_out, clock, reset, , A1L504, , );

--A1L114Q is mem[6][2]~871
--operation mode is normal

A1L114Q = mem[6][2];


--mem[4][2] is mem[4][2]
--operation mode is normal

mem[4][2]_lut_out = mdr[2];
mem[4][2] = DFFEA(mem[4][2]_lut_out, clock, reset, , A1L763, , );

--A1L373Q is mem[4][2]~872
--operation mode is normal

A1L373Q = mem[4][2];


--A1L949 is Mux~1915
--operation mode is normal

A1L949 = mar[0] & (mar[1]) # !mar[0] & (mar[1] & mem[6][2] # !mar[1] & (mem[4][2]));

--A1L8031 is Mux~2310
--operation mode is normal

A1L8031 = mar[0] & (mar[1]) # !mar[0] & (mar[1] & mem[6][2] # !mar[1] & (mem[4][2]));


--mem[7][2] is mem[7][2]
--operation mode is normal

mem[7][2]_lut_out = mdr[2];
mem[7][2] = DFFEA(mem[7][2]_lut_out, clock, reset, , A1L424, , );

--A1L034Q is mem[7][2]~873
--operation mode is normal

A1L034Q = mem[7][2];


--A1L059 is Mux~1916
--operation mode is normal

A1L059 = mar[0] & (A1L949 & (mem[7][2]) # !A1L949 & mem[5][2]) # !mar[0] & (A1L949);

--A1L9031 is Mux~2311
--operation mode is normal

A1L9031 = mar[0] & (A1L949 & (mem[7][2]) # !A1L949 & mem[5][2]) # !mar[0] & (A1L949);


--mem[2][2] is mem[2][2]
--operation mode is normal

mem[2][2]_lut_out = !mdr[2];
mem[2][2] = DFFEA(mem[2][2]_lut_out, clock, reset, , A1L923, , );

--A1L533Q is mem[2][2]~874
--operation mode is normal

A1L533Q = mem[2][2];


--mem[1][2] is mem[1][2]
--operation mode is normal

mem[1][2]_lut_out = !mdr[2];
mem[1][2] = DFFEA(mem[1][2]_lut_out, clock, reset, , A1L013, , );

--A1L613Q is mem[1][2]~875
--operation mode is normal

A1L613Q = mem[1][2];


--mem[0][2] is mem[0][2]
--operation mode is normal

mem[0][2]_lut_out = !mdr[2];
mem[0][2] = DFFEA(mem[0][2]_lut_out, clock, reset, , A1L192, , );