cpu.map.eqn

说明：cpuyuanma1是硬布线控制器源代码

F3_cout[0] = CARRY(mdr[0] & A1L26);


--F6_cs_buffer[1] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

F6_cs_buffer[1] = mdr[0] $ A1L26;

--F6L11 is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~136
--operation mode is arithmetic

F6L11 = mdr[0] $ A1L26;

--F6_cout[1] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

F6_cout[1] = CARRY(A1L26 # !mdr[0]);


--op[0] is op[0]
--operation mode is normal

op[0]_lut_out = present_state.s2 & (mdr[5]) # !present_state.s2 & instr_reg[5];
op[0] = DFFEA(op[0]_lut_out, clock, , , reset, , );

--A1L5361Q is op[0]~123
--operation mode is normal

A1L5361Q = op[0];


--A1L701 is ALU_sub~30
--operation mode is normal

A1L701 = op[0] & present_state.s8 & op[1] & !op[2];

--A1L901 is ALU_sub~32
--operation mode is normal

A1L901 = op[0] & present_state.s8 & op[1] & !op[2];


--A1L301 is ALU_add~12
--operation mode is normal

A1L301 = present_state.s8 & op[1] & !op[0] & !op[2];

--A1L401 is ALU_add~13
--operation mode is normal

A1L401 = present_state.s8 & op[1] & !op[0] & !op[2];


--A1L93 is acc~1773
--operation mode is normal

A1L93 = A1L301 & F3_cs_buffer[0] # !A1L301 & (F6_cs_buffer[1] & A1L701);

--A1L07 is acc~1813
--operation mode is normal

A1L07 = A1L301 & F3_cs_buffer[0] # !A1L301 & (F6_cs_buffer[1] & A1L701);


--A1L04 is acc~1774
--operation mode is normal

A1L04 = A1L83 # present_state.s8 & A1L93;

--A1L17 is acc~1814
--operation mode is normal

A1L17 = A1L83 # present_state.s8 & A1L93;


--instr_reg[0] is instr_reg[0]
--operation mode is normal

instr_reg[0]_lut_out = present_state.s2 & mdr[0] # !present_state.s2 & (instr_reg[0]);
instr_reg[0] = DFFEA(instr_reg[0]_lut_out, clock, reset, , , , );

--A1L741Q is instr_reg[0]~47
--operation mode is normal

A1L741Q = instr_reg[0];


--A1L0371 is sysbus~2728
--operation mode is normal

A1L0371 = present_state.s3 & (present_state.s2 & mdr[0] # !present_state.s2 & (instr_reg[0]));

--A1L9471 is sysbus~2763
--operation mode is normal

A1L9471 = present_state.s3 & (present_state.s2 & mdr[0] # !present_state.s2 & (instr_reg[0]));


--G1_q[0] is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[0]
--operation mode is clrb_cntr

G1_q[0]_lut_out = ((present_state.s0 $ !G1_q[0] & A1L4761) # (mdr[0] & !A1L4761)) & VCC;
G1_q[0] = DFFEA(G1_q[0]_lut_out, clock, reset, , , , );

--G1L31Q is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[0]~0
--operation mode is clrb_cntr

G1L31Q = G1_q[0];

--G1L3 is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT
--operation mode is clrb_cntr

G1L3 = CARRY(G1_q[0]);


--A1L1371 is sysbus~2729
--operation mode is normal

A1L1371 = !present_state.s3 & (present_state.s0 & sysbus[0] # !present_state.s0 & (G1_q[0]));

--A1L0571 is sysbus~2764
--operation mode is normal

A1L0571 = !present_state.s3 & (present_state.s0 & sysbus[0] # !present_state.s0 & (G1_q[0]));


--A1L2371 is sysbus~2730
--operation mode is normal

A1L2371 = present_state.s4 & A1L04 # !present_state.s4 & (A1L0371 # A1L1371);

--A1L1571 is sysbus~2765
--operation mode is normal

A1L1571 = present_state.s4 & A1L04 # !present_state.s4 & (A1L0371 # A1L1371);


--A1L042 is mdr~2403
--operation mode is normal

A1L042 = A1L932 # A1L2371 & present_state.s4 & !A1L9271;

--A1L762 is mdr~2439
--operation mode is normal

A1L762 = A1L932 # A1L2371 & present_state.s4 & !A1L9271;


--A1L8861 is reduce_or~6
--operation mode is normal

A1L8861 = present_state.s9 # present_state.s8 # present_state.s7 # present_state.s2;

--A1L0071 is reduce_or~73
--operation mode is normal

A1L0071 = present_state.s9 # present_state.s8 # present_state.s7 # present_state.s2;


--mdr[1] is mdr[1]
--operation mode is normal

mdr[1]_lut_out = A1L242 # present_state.s4 & A1L5371 & !A1L9271;
mdr[1] = DFFEA(mdr[1]_lut_out, clock, reset, , , , );

--A1L402Q is mdr[1]~2440
--operation mode is normal

A1L402Q = mdr[1];


--mem[6][1] is mem[6][1]
--operation mode is normal

mem[6][1]_lut_out = mdr[1];
mem[6][1] = DFFEA(mem[6][1]_lut_out, clock, reset, , A1L504, , );

--A1L904Q is mem[6][1]~834
--operation mode is normal

A1L904Q = mem[6][1];


--mem[5][1] is mem[5][1]
--operation mode is normal

mem[5][1]_lut_out = !mdr[1];
mem[5][1] = DFFEA(mem[5][1]_lut_out, clock, reset, , A1L683, , );

--A1L093Q is mem[5][1]~835
--operation mode is normal

A1L093Q = mem[5][1];


--mem[4][1] is mem[4][1]
--operation mode is normal

mem[4][1]_lut_out = !mdr[1];
mem[4][1] = DFFEA(mem[4][1]_lut_out, clock, reset, , A1L763, , );

--A1L173Q is mem[4][1]~836
--operation mode is normal

A1L173Q = mem[4][1];


--A1L729 is Mux~1893
--operation mode is normal

A1L729 = mar[1] & (mar[0]) # !mar[1] & (mar[0] & !mem[5][1] # !mar[0] & (!mem[4][1]));

--A1L6821 is Mux~2288
--operation mode is normal

A1L6821 = mar[1] & (mar[0]) # !mar[1] & (mar[0] & !mem[5][1] # !mar[0] & (!mem[4][1]));


--mem[7][1] is mem[7][1]
--operation mode is normal

mem[7][1]_lut_out = mdr[1];
mem[7][1] = DFFEA(mem[7][1]_lut_out, clock, reset, , A1L424, , );

--A1L824Q is mem[7][1]~837
--operation mode is normal

A1L824Q = mem[7][1];


--A1L829 is Mux~1894
--operation mode is normal

A1L829 = mar[1] & (A1L729 & (mem[7][1]) # !A1L729 & mem[6][1]) # !mar[1] & (A1L729);

--A1L7821 is Mux~2289
--operation mode is normal

A1L7821 = mar[1] & (A1L729 & (mem[7][1]) # !A1L729 & mem[6][1]) # !mar[1] & (A1L729);


--mem[9][1] is mem[9][1]
--operation mode is normal

mem[9][1]_lut_out = mdr[1];
mem[9][1] = DFFEA(mem[9][1]_lut_out, clock, reset, , A1L264, , );

--A1L664Q is mem[9][1]~838
--operation mode is normal

A1L664Q = mem[9][1];


--mem[10][1] is mem[10][1]
--operation mode is normal

mem[10][1]_lut_out = mdr[1];
mem[10][1] = DFFEA(mem[10][1]_lut_out, clock, reset, , A1L184, , );

--A1L584Q is mem[10][1]~839
--operation mode is normal

A1L584Q = mem[10][1];


--mem[8][1] is mem[8][1]
--operation mode is normal

mem[8][1]_lut_out = mdr[1];
mem[8][1] = DFFEA(mem[8][1]_lut_out, clock, reset, , A1L344, , );

--A1L744Q is mem[8][1]~840
--operation mode is normal

A1L744Q = mem[8][1];


--A1L929 is Mux~1895
--operation mode is normal

A1L929 = mar[0] & (mar[1]) # !mar[0] & (mar[1] & mem[10][1] # !mar[1] & (mem[8][1]));

--A1L8821 is Mux~2290
--operation mode is normal

A1L8821 = mar[0] & (mar[1]) # !mar[0] & (mar[1] & mem[10][1] # !mar[1] & (mem[8][1]));


--mem[11][1] is mem[11][1]
--operation mode is normal

mem[11][1]_lut_out = mdr[1];
mem[11][1] = DFFEA(mem[11][1]_lut_out, clock, reset, , A1L005, , );

--A1L405Q is mem[11][1]~841
--operation mode is normal

A1L405Q = mem[11][1];


--A1L039 is Mux~1896
--operation mode is normal

A1L039 = mar[0] & (A1L929 & (mem[11][1]) # !A1L929 & mem[9][1]) # !mar[0] & (A1L929);

--A1L9821 is Mux~2291
--operation mode is normal

A1L9821 = mar[0] & (A1L929 & (mem[11][1]) # !A1L929 & mem[9][1]) # !mar[0] & (A1L929);


--mem[1][1] is mem[1][1]
--operation mode is normal

mem[1][1]_lut_out = mdr[1];
mem[1][1] = DFFEA(mem[1][1]_lut_out, clock, reset, , A1L013, , );

--A1L413Q is mem[1][1]~842
--operation mode is normal

A1L413Q = mem[1][1];


--mem[2][1] is mem[2][1]
--operation mode is normal

mem[2][1]_lut_out = !mdr[1];
mem[2][1] = DFFEA(mem[2][1]_lut_out, clock, reset, , A1L923, , );

--A1L333Q is mem[2][1]~843
--operation mode is normal

A1L333Q = mem[2][1];


--mem[0][1] is mem[0][1]
--operation mode is normal

mem[0][1]_lut_out = mdr[1];
mem[0][1] = DFFEA(mem[0][1]_lut_out, clock, reset, , A1L192, , );

--A1L592Q is mem[0][1]~844
--operation mode is normal

A1L592Q = mem[0][1];


--A1L139 is Mux~1897
--operation mode is normal

A1L139 = mar[0] & (mar[1]) # !mar[0] & (mar[1] & !mem[2][1] # !mar[1] & (mem[0][1]));

--A1L0921 is Mux~2292
--operation mode is normal

A1L0921 = mar[0] & (mar[1]) # !mar[0] & (mar[1] & !mem[2][1] # !mar[1] & (mem[0][1]));


--mem[3][1] is mem[3][1]
--operation mode is normal

mem[3][1]_lut_out = !mdr[1];
mem[3][1] = DFFEA(mem[3][1]_lut_out, clock, reset, , A1L843, , );

--A1L253Q is mem[3][1]~845
--operation mode is normal

A1L253Q = mem[3][1];


--A1L239 is Mux~1898
--operation mode is normal

A1L239 = mar[0] & (A1L139 & (!mem[3][1]) # !A1L139 & mem[1][1]) # !mar[0] & (A1L139);

--A1L1921 is Mux~2293
--operation mode is normal

A1L1921 = mar[0] & (A1L139 & (!mem[3][1]) # !A1L139 & mem[1][1]) # !mar[0] & (A1L139);


--A1L339 is Mux~1899
--operation mode is normal

A1L339 = mar[2] & (mar[3]) # !mar[2] & (mar[3] & A1L039 # !mar[3] & (A1L239));

--A1L2921 is Mux~2294
--operation mode is normal

A1L2921 = mar[2] & (mar[3]) # !mar[2] & (mar[3] & A1L039 # !mar[3] & (A1L239));


--mem[14][1] is mem[14][1]
--operation mode is normal

mem[14][1]_lut_out = mdr[1];
mem[14][1] = DFFEA(mem[14][1]_lut_out, clock, reset, , A1L755, , );

--A1L165Q is mem[14][1]~846
--operation mode is normal

A1L165Q = mem[14][1];


--mem[13][1] is mem[13][1]
--operation mode is normal

mem[13][1]_lut_out = mdr[1];
mem[13][1] = DFFEA(mem[13][1]_lut_out, clock, reset, , A1L835, , );

--A1L245Q is mem[13][1]~847
--operation mode is normal

A1L245Q = mem[13][1];


--mem[12][1] is mem[12][1]
--operation mode is normal

mem[12][1]_lut_out = mdr[1];
mem[12][1] = DFFEA(mem[12][1]_lut_out, clock, reset, , A1L915, , );

--A1L325Q is mem[12][1]~848
--operation mode is normal

A1L325Q = mem[12][1];


--A1L439 is Mux~1900
--operation mode is normal

A1L439 = mar[1] & (mar[0]) # !mar[1] & (mar[0] & mem[13][1] # !mar[0] & (mem[12][1]));

--A1L3921 is Mux~2295
--operation mode is normal

A1L3921 = mar[1] & (mar[0]) # !mar[1] & (mar[0] & mem[13][1] # !mar[0] & (mem[12][1]));


--mem[15][1] is mem[15][1]
--operation mode is normal

mem[15][1]_lut_out = mdr[1];
mem[15][1] = DFFEA(mem[15][1]_lut_out, clock, reset, , A1L675, , );

--A1L085Q is mem[15][1]~849
--operation mode is normal

A1L085Q = mem[15][1];


--A1L539 is Mux~1901
--operation mode is normal

A1L539 = mar[1] & (A1L439 & (mem[15][1]) # !A1L439 & mem[14][1]) # !mar[1] & (A1L439);

--A1L4921 is Mux~2296
--operation mode is normal

A1L4921 = mar[1] & (A1L439 & (mem[15][1]) # !A1L439 & mem[14][1]) # !mar[1] & (A1L439);


--A1L639 is Mux~1902
--operation mode is normal

A1L639 = mar[2] & (A1L339 & (A1L539) # !A1L339 & A1L829) # !mar[2] & (A1L339);

--A1L5921 is Mux~2297
--operation mode is normal

A1L5921 = mar[2] & (A1L339 & (A1L539) # !A1L339 & A1L829) # !mar[2] & (A1L339);


--A1L142 is mdr~2404
--operation mode is normal

A1L142 = A1L632 & (A1L639 # A1L532 & mdr[1]) # !A1L632 & A1L532 & mdr[1];

--A1L862 is mdr~2441
--operation mode is normal

A1L862 = A1L632 & (A1L639 # A1L532 & mdr[1]) # !A1L632 & A1L532 & mdr[1];


--mem[21][1] is mem[21][1]
--operation mode is normal

mem[21][1]_lut_out = mdr[1];
mem[21][1] = DFFEA(mem[21][1]_lut_out, clock, reset, , A1L096, , );

--A1L496Q is mem[21][1]~850
--operation mode is normal

A1L496Q = mem[21][1];


--mem[25][1] is mem[25][1]
--operation mode is normal

mem[25][1]_lut_out = mdr[1];
mem[25][1] = DFFEA(mem[25][1]_lut_out, clock, reset, , A1L667, , );

--A1L077Q is mem[25][1]~851
--operation mode is normal

A1L077Q = mem[25][1];


--mem[17][1] is mem[17][1]
--operation mode is normal

mem[17][1]_lut_out = mdr[1];
mem[17][1] = DFFEA(mem[17][1]_lut_out, clock, reset, , A1L416, , );

--A1L816Q is mem[17][1]~852
--operation mode is normal

A1L816Q = mem[17][1];


--A1L739 is Mux~1903
--operation mode is normal

A1L739 = mar[2] & (mar[3]) # !mar[2] & (mar[3] & mem[25][1] # !mar[3] & (mem[17][1]));

--A1L6921 is Mux~2298
--operation mode is normal

A1L6921 = mar[2] & (mar[3]) # !mar[2] & (mar[3] & mem[25][1] # !mar[3] & (mem[17][1]));


--mem[29][1] is mem[29][1]
--operation mode is normal

mem[29][1]_lut_out = mdr[1];
mem[29][1] = DFFEA(mem[29][1]_lut_out, clock, reset, , A1L248, , );

--A1L648Q is mem[29][1]~853
--operation mode is normal

A1L648Q = mem[29][1];


--A1L839 is Mux~1904
--operation mode is normal

A1L839 = mar[2] & (A1L739 & (mem[29][1]) # !A1L739 & mem[21][1]) # !mar[2] & (A1L739);

--A1L7921 is Mux~2299
--operation mode is normal

A1L7921 = mar[2] & (A1L739 & (mem[29][1]) # !A1L739 & mem[21][1]) # !mar[2] & (A1L739);


--mem[26][1] is mem[26][1]
--operation mode is normal

mem[26][1]_lut_out = mdr[1];
mem[26][1] = DFFEA(mem[26][1]_lut_out, clock, reset, , A1L587, , );

--A1L987Q is mem[26][1]~854
--operation mode is normal

A1L987Q = mem[26][1];