cpu.map.eqn

说明：cpuyuanma1是硬布线控制器源代码

-- Copyright (C) 1991-2005 Altera Corporation
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-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--sysbus[0] is sysbus[0]
--operation mode is normal

sysbus[0]_lut_out = A1L8861 & A1L042 # !A1L8861 & (A1L2371);
sysbus[0] = DFFEA(sysbus[0]_lut_out, clock, reset, , , , );

--A1L5071Q is sysbus[0]~2754
--operation mode is normal

A1L5071Q = sysbus[0];


--sysbus[1] is sysbus[1]
--operation mode is normal

sysbus[1]_lut_out = A1L8861 & A1L342 # !A1L8861 & (A1L5371);
sysbus[1] = DFFEA(sysbus[1]_lut_out, clock, reset, , , , );

--A1L7071Q is sysbus[1]~2755
--operation mode is normal

A1L7071Q = sysbus[1];


--sysbus[2] is sysbus[2]
--operation mode is normal

sysbus[2]_lut_out = A1L8861 & A1L642 # !A1L8861 & (A1L8371);
sysbus[2] = DFFEA(sysbus[2]_lut_out, clock, reset, , , , );

--A1L9071Q is sysbus[2]~2756
--operation mode is normal

A1L9071Q = sysbus[2];


--sysbus[3] is sysbus[3]
--operation mode is normal

sysbus[3]_lut_out = A1L8861 & A1L942 # !A1L8861 & (A1L1471);
sysbus[3] = DFFEA(sysbus[3]_lut_out, clock, reset, , , , );

--A1L1171Q is sysbus[3]~2757
--operation mode is normal

A1L1171Q = sysbus[3];


--sysbus[4] is sysbus[4]
--operation mode is normal

sysbus[4]_lut_out = A1L8861 & A1L252 # !A1L8861 & (A1L4471);
sysbus[4] = DFFEA(sysbus[4]_lut_out, clock, reset, , , , );

--A1L3171Q is sysbus[4]~2758
--operation mode is normal

A1L3171Q = sysbus[4];


--sysbus[5] is sysbus[5]
--operation mode is normal

sysbus[5]_lut_out = A1L8861 & A1L552 # !A1L8861 & (A1L5471);
sysbus[5] = DFFEA(sysbus[5]_lut_out, clock, reset, , , , );

--A1L5171Q is sysbus[5]~2759
--operation mode is normal

A1L5171Q = sysbus[5];


--sysbus[6] is sysbus[6]
--operation mode is normal

sysbus[6]_lut_out = A1L8861 & A1L852 # !A1L8861 & (A1L6471);
sysbus[6] = DFFEA(sysbus[6]_lut_out, clock, reset, , , , );

--A1L7171Q is sysbus[6]~2760
--operation mode is normal

A1L7171Q = sysbus[6];


--sysbus[7] is sysbus[7]
--operation mode is normal

sysbus[7]_lut_out = A1L8861 & A1L162 # !A1L8861 & (A1L7471);
sysbus[7] = DFFEA(sysbus[7]_lut_out, clock, reset, , , , );

--A1L9171Q is sysbus[7]~2761
--operation mode is normal

A1L9171Q = sysbus[7];


--present_state.s3 is present_state.s3
--operation mode is normal

present_state.s3_lut_out = present_state.s2;
present_state.s3 = DFFEA(present_state.s3_lut_out, clock, reset, , , , );

--A1L2661Q is present_state.s3~36
--operation mode is normal

A1L2661Q = present_state.s3;


--present_state.s1 is present_state.s1
--operation mode is normal

present_state.s1_lut_out = !present_state.s0;
present_state.s1 = DFFEA(present_state.s1_lut_out, clock, reset, , , , );

--A1L8561Q is present_state.s1~31
--operation mode is normal

A1L8561Q = present_state.s1;


--present_state.s9 is present_state.s9
--operation mode is normal

present_state.s9_lut_out = !A1L9671Q & (op[2] & A1L1361);
present_state.s9 = DFFEA(present_state.s9_lut_out, clock, reset, , , , );

--A1L5761Q is present_state.s9~36
--operation mode is normal

A1L5761Q = present_state.s9;


--present_state.s5 is present_state.s5
--operation mode is normal

present_state.s5_lut_out = present_state.s4;
present_state.s5 = DFFEA(present_state.s5_lut_out, clock, reset, , , , );

--A1L6661Q is present_state.s5~36
--operation mode is normal

A1L6661Q = present_state.s5;


--present_state.s7 is present_state.s7
--operation mode is normal

present_state.s7_lut_out = present_state.s6 & !op[2] & !op[1] & !op[0];
present_state.s7 = DFFEA(present_state.s7_lut_out, clock, reset, , , , );

--A1L0761Q is present_state.s7~42
--operation mode is normal

A1L0761Q = present_state.s7;


--A1L9861 is reduce_or~62
--operation mode is normal

A1L9861 = !present_state.s9 & !present_state.s5 & !present_state.s7;

--A1L3961 is reduce_or~66
--operation mode is normal

A1L3961 = !present_state.s9 & !present_state.s5 & !present_state.s7;


--A1L6861 is reduce_or~4
--operation mode is normal

A1L6861 = present_state.s3 # present_state.s1 # !A1L9861;

--A1L4961 is reduce_or~67
--operation mode is normal

A1L4961 = present_state.s3 # present_state.s1 # !A1L9861;


--present_state.s10 is present_state.s10
--operation mode is normal

present_state.s10_lut_out = A1L9671Q & op[2] & A1L1361;
present_state.s10 = DFFEA(present_state.s10_lut_out, clock, reset, , , , );

--A1L7761Q is present_state.s10~28
--operation mode is normal

A1L7761Q = present_state.s10;


--present_state.s6 is present_state.s6
--operation mode is normal

present_state.s6_lut_out = present_state.s3 & (op[2] # op[1] # !op[0]);
present_state.s6 = DFFEA(present_state.s6_lut_out, clock, reset, , , , );

--A1L8661Q is present_state.s6~44
--operation mode is normal

A1L8661Q = present_state.s6;


--present_state.s2 is present_state.s2
--operation mode is normal

present_state.s2_lut_out = present_state.s1;
present_state.s2 = DFFEA(present_state.s2_lut_out, clock, reset, , , , );

--A1L0661Q is present_state.s2~22
--operation mode is normal

A1L0661Q = present_state.s2;


--A1L0961 is reduce_or~63
--operation mode is normal

A1L0961 = !present_state.s7 & !present_state.s2;

--A1L5961 is reduce_or~68
--operation mode is normal

A1L5961 = !present_state.s7 & !present_state.s2;


--A1L5861 is reduce_or~3
--operation mode is normal

A1L5861 = present_state.s10 # present_state.s3 # present_state.s6 # !A1L0961;

--A1L6961 is reduce_or~69
--operation mode is normal

A1L6961 = present_state.s10 # present_state.s3 # present_state.s6 # !A1L0961;


--present_state.s4 is present_state.s4
--operation mode is normal

present_state.s4_lut_out = !op[2] & !op[1] & present_state.s3 & op[0];
present_state.s4 = DFFEA(present_state.s4_lut_out, clock, reset, , , , );

--A1L4661Q is present_state.s4~14
--operation mode is normal

A1L4661Q = present_state.s4;


--A1L1961 is reduce_or~64
--operation mode is normal

A1L1961 = present_state.s5 # present_state.s7 # present_state.s6 # present_state.s4;

--A1L7961 is reduce_or~70
--operation mode is normal

A1L7961 = present_state.s5 # present_state.s7 # present_state.s6 # present_state.s4;


--present_state.s8 is present_state.s8
--operation mode is normal

present_state.s8_lut_out = present_state.s6 & (op[1] # op[0]);
present_state.s8 = DFFEA(present_state.s8_lut_out, clock, reset, , , , );

--A1L2761Q is present_state.s8~52
--operation mode is normal

A1L2761Q = present_state.s8;


--A1L4861 is reduce_or~1
--operation mode is normal

A1L4861 = present_state.s10 # present_state.s9 # present_state.s8;

--A1L8961 is reduce_or~71
--operation mode is normal

A1L8961 = present_state.s10 # present_state.s9 # present_state.s8;


--mem[10][0] is mem[10][0]
--operation mode is normal

mem[10][0]_lut_out = mdr[0];
mem[10][0] = DFFEA(mem[10][0]_lut_out, clock, reset, , A1L184, , );

--A1L284Q is mem[10][0]~802
--operation mode is normal

A1L284Q = mem[10][0];


--mar[1] is mar[1]
--operation mode is normal

mar[1]_lut_out = present_state.s0 & (present_state.s3 & A1L5371 # !present_state.s3 & (mar[1])) # !present_state.s0 & A1L5371;
mar[1] = DFFEA(mar[1]_lut_out, clock, reset, , , , );

--A1L281Q is mar[1]~795
--operation mode is normal

A1L281Q = mar[1];


--mem[9][0] is mem[9][0]
--operation mode is normal

mem[9][0]_lut_out = mdr[0];
mem[9][0] = DFFEA(mem[9][0]_lut_out, clock, reset, , A1L264, , );

--A1L364Q is mem[9][0]~803
--operation mode is normal

A1L364Q = mem[9][0];


--mar[0] is mar[0]
--operation mode is normal

mar[0]_lut_out = present_state.s0 & (present_state.s3 & A1L2371 # !present_state.s3 & (mar[0])) # !present_state.s0 & A1L2371;
mar[0] = DFFEA(mar[0]_lut_out, clock, reset, , , , );

--A1L081Q is mar[0]~796
--operation mode is normal

A1L081Q = mar[0];


--mem[8][0] is mem[8][0]
--operation mode is normal

mem[8][0]_lut_out = mdr[0];
mem[8][0] = DFFEA(mem[8][0]_lut_out, clock, reset, , A1L344, , );

--A1L444Q is mem[8][0]~804
--operation mode is normal

A1L444Q = mem[8][0];


--A1L709 is Mux~1873
--operation mode is normal

A1L709 = mar[1] & (mar[0]) # !mar[1] & (mar[0] & mem[9][0] # !mar[0] & (mem[8][0]));

--A1L6621 is Mux~2268
--operation mode is normal

A1L6621 = mar[1] & (mar[0]) # !mar[1] & (mar[0] & mem[9][0] # !mar[0] & (mem[8][0]));


--mem[11][0] is mem[11][0]
--operation mode is normal

mem[11][0]_lut_out = mdr[0];
mem[11][0] = DFFEA(mem[11][0]_lut_out, clock, reset, , A1L005, , );

--A1L105Q is mem[11][0]~805
--operation mode is normal

A1L105Q = mem[11][0];


--A1L809 is Mux~1874
--operation mode is normal

A1L809 = mar[1] & (A1L709 & (mem[11][0]) # !A1L709 & mem[10][0]) # !mar[1] & (A1L709);

--A1L7621 is Mux~2269
--operation mode is normal

A1L7621 = mar[1] & (A1L709 & (mem[11][0]) # !A1L709 & mem[10][0]) # !mar[1] & (A1L709);


--mar[3] is mar[3]
--operation mode is normal

mar[3]_lut_out = present_state.s0 & (present_state.s3 & A1L1471 # !present_state.s3 & (mar[3])) # !present_state.s0 & A1L1471;
mar[3] = DFFEA(mar[3]_lut_out, clock, reset, , , , );

--A1L681Q is mar[3]~797
--operation mode is normal

A1L681Q = mar[3];


--mem[5][0] is mem[5][0]
--operation mode is normal

mem[5][0]_lut_out = !mdr[0];
mem[5][0] = DFFEA(mem[5][0]_lut_out, clock, reset, , A1L683, , );

--A1L783Q is mem[5][0]~806
--operation mode is normal

A1L783Q = mem[5][0];


--mem[6][0] is mem[6][0]
--operation mode is normal

mem[6][0]_lut_out = mdr[0];
mem[6][0] = DFFEA(mem[6][0]_lut_out, clock, reset, , A1L504, , );

--A1L604Q is mem[6][0]~807
--operation mode is normal

A1L604Q = mem[6][0];


--mem[4][0] is mem[4][0]
--operation mode is normal

mem[4][0]_lut_out = mdr[0];
mem[4][0] = DFFEA(mem[4][0]_lut_out, clock, reset, , A1L763, , );

--A1L863Q is mem[4][0]~808
--operation mode is normal

A1L863Q = mem[4][0];


--A1L909 is Mux~1875
--operation mode is normal

A1L909 = mar[0] & (mar[1]) # !mar[0] & (mar[1] & mem[6][0] # !mar[1] & (mem[4][0]));

--A1L8621 is Mux~2270
--operation mode is normal

A1L8621 = mar[0] & (mar[1]) # !mar[0] & (mar[1] & mem[6][0] # !mar[1] & (mem[4][0]));


--mem[7][0] is mem[7][0]
--operation mode is normal

mem[7][0]_lut_out = mdr[0];
mem[7][0] = DFFEA(mem[7][0]_lut_out, clock, reset, , A1L424, , );

--A1L524Q is mem[7][0]~809
--operation mode is normal

A1L524Q = mem[7][0];


--A1L019 is Mux~1876
--operation mode is normal

A1L019 = mar[0] & (A1L909 & (mem[7][0]) # !A1L909 & !mem[5][0]) # !mar[0] & (A1L909);

--A1L9621 is Mux~2271
--operation mode is normal

A1L9621 = mar[0] & (A1L909 & (mem[7][0]) # !A1L909 & !mem[5][0]) # !mar[0] & (A1L909);


--mar[2] is mar[2]
--operation mode is normal

mar[2]_lut_out = present_state.s0 & (present_state.s3 & A1L8371 # !present_state.s3 & (mar[2])) # !present_state.s0 & A1L8371;
mar[2] = DFFEA(mar[2]_lut_out, clock, reset, , , , );

--A1L481Q is mar[2]~798
--operation mode is normal

A1L481Q = mar[2];


--mem[2][0] is mem[2][0]
--operation mode is normal

mem[2][0]_lut_out = mdr[0];
mem[2][0] = DFFEA(mem[2][0]_lut_out, clock, reset, , A1L923, , );

--A1L033Q is mem[2][0]~810
--operation mode is normal

A1L033Q = mem[2][0];


--mem[1][0] is mem[1][0]
--operation mode is normal

mem[1][0]_lut_out = !mdr[0];
mem[1][0] = DFFEA(mem[1][0]_lut_out, clock, reset, , A1L013, , );

--A1L113Q is mem[1][0]~811
--operation mode is normal

A1L113Q = mem[1][0];


--mem[0][0] is mem[0][0]
--operation mode is normal

mem[0][0]_lut_out = mdr[0];
mem[0][0] = DFFEA(mem[0][0]_lut_out, clock, reset, , A1L192, , );

--A1L292Q is mem[0][0]~812
--operation mode is normal

A1L292Q = mem[0][0];


--A1L119 is Mux~1877
--operation mode is normal

A1L119 = mar[1] & (mar[0]) # !mar[1] & (mar[0] & !mem[1][0] # !mar[0] & (mem[0][0]));

--A1L0721 is Mux~2272
--operation mode is normal

A1L0721 = mar[1] & (mar[0]) # !mar[1] & (mar[0] & !mem[1][0] # !mar[0] & (mem[0][0]));


--mem[3][0] is mem[3][0]
--operation mode is normal

mem[3][0]_lut_out = !mdr[0];
mem[3][0] = DFFEA(mem[3][0]_lut_out, clock, reset, , A1L843, , );

--A1L943Q is mem[3][0]~813
--operation mode is normal

A1L943Q = mem[3][0];


--A1L219 is Mux~1878
--operation mode is normal

A1L219 = mar[1] & (A1L119 & (!mem[3][0]) # !A1L119 & mem[2][0]) # !mar[1] & (A1L119);

--A1L1721 is Mux~2273
--operation mode is normal

A1L1721 = mar[1] & (A1L119 & (!mem[3][0]) # !A1L119 & mem[2][0]) # !mar[1] & (A1L119);


--A1L319 is Mux~1879
--operation mode is normal

A1L319 = mar[3] & (mar[2]) # !mar[3] & (mar[2] & A1L019 # !mar[2] & (A1L219));

--A1L2721 is Mux~2274
--operation mode is normal

A1L2721 = mar[3] & (mar[2]) # !mar[3] & (mar[2] & A1L019 # !mar[2] & (A1L219));


--mem[13][0] is mem[13][0]