cpu.fit.eqn

说明：cpuyuanma1是硬布线控制器源代码

A1L085Q = mem[15][1];


--A1L539 is Mux~1901 at LC2_F18
--operation mode is normal

A1L539 = A1L439 & (mem[15][1] # !mar[1]) # !A1L439 & (mar[1] & mem[14][1]);

--A1L4921 is Mux~2296 at LC2_F18
--operation mode is normal

A1L4921 = A1L439 & (mem[15][1] # !mar[1]) # !A1L439 & (mar[1] & mem[14][1]);


--A1L639 is Mux~1902 at LC3_F33
--operation mode is normal

A1L639 = A1L339 & (A1L539 # !mar[2]) # !A1L339 & (mar[2] & A1L829);

--A1L5921 is Mux~2297 at LC3_F33
--operation mode is normal

A1L5921 = A1L339 & (A1L539 # !mar[2]) # !A1L339 & (mar[2] & A1L829);


--A1L142 is mdr~2404 at LC6_F33
--operation mode is normal

A1L142 = A1L639 & (A1L632 # mdr[1] & A1L532) # !A1L639 & mdr[1] & A1L532;

--A1L862 is mdr~2441 at LC6_F33
--operation mode is normal

A1L862 = A1L639 & (A1L632 # mdr[1] & A1L532) # !A1L639 & mdr[1] & A1L532;


--mem[21][1] is mem[21][1] at LC2_G41
--operation mode is normal

mem[21][1]_lut_out = mdr[1];
mem[21][1] = DFFEA(mem[21][1]_lut_out, GLOBAL(clock), reset, , A1L096, , );

--A1L496Q is mem[21][1]~850 at LC2_G41
--operation mode is normal

A1L496Q = mem[21][1];


--mem[25][1] is mem[25][1] at LC3_G41
--operation mode is normal

mem[25][1]_lut_out = mdr[1];
mem[25][1] = DFFEA(mem[25][1]_lut_out, GLOBAL(clock), reset, , A1L667, , );

--A1L077Q is mem[25][1]~851 at LC3_G41
--operation mode is normal

A1L077Q = mem[25][1];


--mem[17][1] is mem[17][1] at LC4_G41
--operation mode is normal

mem[17][1]_lut_out = mdr[1];
mem[17][1] = DFFEA(mem[17][1]_lut_out, GLOBAL(clock), reset, , A1L416, , );

--A1L816Q is mem[17][1]~852 at LC4_G41
--operation mode is normal

A1L816Q = mem[17][1];


--A1L739 is Mux~1903 at LC6_G41
--operation mode is normal

A1L739 = mar[3] & (mem[25][1] # mar[2]) # !mar[3] & mem[17][1] & (!mar[2]);

--A1L6921 is Mux~2298 at LC6_G41
--operation mode is normal

A1L6921 = mar[3] & (mem[25][1] # mar[2]) # !mar[3] & mem[17][1] & (!mar[2]);


--mem[29][1] is mem[29][1] at LC7_G41
--operation mode is normal

mem[29][1]_lut_out = mdr[1];
mem[29][1] = DFFEA(mem[29][1]_lut_out, GLOBAL(clock), reset, , A1L248, , );

--A1L648Q is mem[29][1]~853 at LC7_G41
--operation mode is normal

A1L648Q = mem[29][1];


--A1L839 is Mux~1904 at LC1_G41
--operation mode is normal

A1L839 = A1L739 & (mem[29][1] # !mar[2]) # !A1L739 & (mar[2] & mem[21][1]);

--A1L7921 is Mux~2299 at LC1_G41
--operation mode is normal

A1L7921 = A1L739 & (mem[29][1] # !mar[2]) # !A1L739 & (mar[2] & mem[21][1]);


--mem[26][1] is mem[26][1] at LC2_G38
--operation mode is normal

mem[26][1]_lut_out = mdr[1];
mem[26][1] = DFFEA(mem[26][1]_lut_out, GLOBAL(clock), reset, , A1L587, , );

--A1L987Q is mem[26][1]~854 at LC2_G38
--operation mode is normal

A1L987Q = mem[26][1];


--mem[22][1] is mem[22][1] at LC3_G38
--operation mode is normal

mem[22][1]_lut_out = mdr[1];
mem[22][1] = DFFEA(mem[22][1]_lut_out, GLOBAL(clock), reset, , A1L907, , );

--A1L317Q is mem[22][1]~855 at LC3_G38
--operation mode is normal

A1L317Q = mem[22][1];


--mem[18][1] is mem[18][1] at LC1_I38
--operation mode is normal

mem[18][1]_lut_out = mdr[1];
mem[18][1] = DFFEA(mem[18][1]_lut_out, GLOBAL(clock), reset, , A1L336, , );

--A1L736Q is mem[18][1]~856 at LC1_I38
--operation mode is normal

A1L736Q = mem[18][1];


--A1L939 is Mux~1905 at LC4_G38
--operation mode is normal

A1L939 = mar[2] & (mem[22][1] # mar[3]) # !mar[2] & mem[18][1] & (!mar[3]);

--A1L8921 is Mux~2300 at LC4_G38
--operation mode is normal

A1L8921 = mar[2] & (mem[22][1] # mar[3]) # !mar[2] & mem[18][1] & (!mar[3]);


--mem[30][1] is mem[30][1] at LC5_G38
--operation mode is normal

mem[30][1]_lut_out = mdr[1];
mem[30][1] = DFFEA(mem[30][1]_lut_out, GLOBAL(clock), reset, , A1L168, , );

--A1L568Q is mem[30][1]~857 at LC5_G38
--operation mode is normal

A1L568Q = mem[30][1];


--A1L049 is Mux~1906 at LC1_G38
--operation mode is normal

A1L049 = A1L939 & (mem[30][1] # !mar[3]) # !A1L939 & (mar[3] & mem[26][1]);

--A1L9921 is Mux~2301 at LC1_G38
--operation mode is normal

A1L9921 = A1L939 & (mem[30][1] # !mar[3]) # !A1L939 & (mar[3] & mem[26][1]);


--mem[24][1] is mem[24][1] at LC3_G36
--operation mode is normal

mem[24][1]_lut_out = mdr[1];
mem[24][1] = DFFEA(mem[24][1]_lut_out, GLOBAL(clock), reset, , A1L747, , );

--A1L157Q is mem[24][1]~858 at LC3_G36
--operation mode is normal

A1L157Q = mem[24][1];


--mem[20][1] is mem[20][1] at LC4_G36
--operation mode is normal

mem[20][1]_lut_out = mdr[1];
mem[20][1] = DFFEA(mem[20][1]_lut_out, GLOBAL(clock), reset, , A1L176, , );

--A1L576Q is mem[20][1]~859 at LC4_G36
--operation mode is normal

A1L576Q = mem[20][1];


--mem[16][1] is mem[16][1] at LC5_G36
--operation mode is normal

mem[16][1]_lut_out = mdr[1];
mem[16][1] = DFFEA(mem[16][1]_lut_out, GLOBAL(clock), reset, , A1L595, , );

--A1L995Q is mem[16][1]~860 at LC5_G36
--operation mode is normal

A1L995Q = mem[16][1];


--A1L149 is Mux~1907 at LC6_G36
--operation mode is normal

A1L149 = mar[2] & (mem[20][1] # mar[3]) # !mar[2] & mem[16][1] & (!mar[3]);

--A1L0031 is Mux~2302 at LC6_G36
--operation mode is normal

A1L0031 = mar[2] & (mem[20][1] # mar[3]) # !mar[2] & mem[16][1] & (!mar[3]);


--mem[28][1] is mem[28][1] at LC7_G36
--operation mode is normal

mem[28][1]_lut_out = mdr[1];
mem[28][1] = DFFEA(mem[28][1]_lut_out, GLOBAL(clock), reset, , A1L328, , );

--A1L728Q is mem[28][1]~861 at LC7_G36
--operation mode is normal

A1L728Q = mem[28][1];


--A1L249 is Mux~1908 at LC2_G36
--operation mode is normal

A1L249 = A1L149 & (mem[28][1] # !mar[3]) # !A1L149 & (mar[3] & mem[24][1]);

--A1L1031 is Mux~2303 at LC2_G36
--operation mode is normal

A1L1031 = A1L149 & (mem[28][1] # !mar[3]) # !A1L149 & (mar[3] & mem[24][1]);


--A1L349 is Mux~1909 at LC3_G40
--operation mode is normal

A1L349 = mar[1] & (A1L049 # mar[0]) # !mar[1] & A1L249 & (!mar[0]);

--A1L2031 is Mux~2304 at LC3_G40
--operation mode is normal

A1L2031 = mar[1] & (A1L049 # mar[0]) # !mar[1] & A1L249 & (!mar[0]);


--mem[23][1] is mem[23][1] at LC2_G44
--operation mode is normal

mem[23][1]_lut_out = mdr[1];
mem[23][1] = DFFEA(mem[23][1]_lut_out, GLOBAL(clock), reset, , A1L827, , );

--A1L237Q is mem[23][1]~862 at LC2_G44
--operation mode is normal

A1L237Q = mem[23][1];


--mem[27][1] is mem[27][1] at LC3_G44
--operation mode is normal

mem[27][1]_lut_out = mdr[1];
mem[27][1] = DFFEA(mem[27][1]_lut_out, GLOBAL(clock), reset, , A1L408, , );

--A1L808Q is mem[27][1]~863 at LC3_G44
--operation mode is normal

A1L808Q = mem[27][1];


--mem[19][1] is mem[19][1] at LC4_G44
--operation mode is normal

mem[19][1]_lut_out = mdr[1];
mem[19][1] = DFFEA(mem[19][1]_lut_out, GLOBAL(clock), reset, , A1L256, , );

--A1L656Q is mem[19][1]~864 at LC4_G44
--operation mode is normal

A1L656Q = mem[19][1];


--A1L449 is Mux~1910 at LC5_G44
--operation mode is normal

A1L449 = mar[3] & (mem[27][1] # mar[2]) # !mar[3] & mem[19][1] & (!mar[2]);

--A1L3031 is Mux~2305 at LC5_G44
--operation mode is normal

A1L3031 = mar[3] & (mem[27][1] # mar[2]) # !mar[3] & mem[19][1] & (!mar[2]);


--mem[31][1] is mem[31][1] at LC6_G44
--operation mode is normal

mem[31][1]_lut_out = mdr[1];
mem[31][1] = DFFEA(mem[31][1]_lut_out, GLOBAL(clock), reset, , A1L088, , );

--A1L488Q is mem[31][1]~865 at LC6_G44
--operation mode is normal

A1L488Q = mem[31][1];


--A1L549 is Mux~1911 at LC1_G44
--operation mode is normal

A1L549 = A1L449 & (mem[31][1] # !mar[2]) # !A1L449 & (mar[2] & mem[23][1]);

--A1L4031 is Mux~2306 at LC1_G44
--operation mode is normal

A1L4031 = A1L449 & (mem[31][1] # !mar[2]) # !A1L449 & (mar[2] & mem[23][1]);


--A1L649 is Mux~1912 at LC1_G40
--operation mode is normal

A1L649 = A1L349 & (A1L549 # !mar[0]) # !A1L349 & (mar[0] & A1L839);

--A1L5031 is Mux~2307 at LC1_G40
--operation mode is normal

A1L5031 = A1L349 & (A1L549 # !mar[0]) # !A1L349 & (mar[0] & A1L839);


--A1L242 is mdr~2405 at LC7_F33
--operation mode is normal

A1L242 = A1L142 # A1L649 & A1L832;

--A1L962 is mdr~2442 at LC7_F33
--operation mode is normal

A1L962 = A1L142 # A1L649 & A1L832;


--acc[1] is acc[1] at LC1_F42
--operation mode is normal

acc[1]_lut_out = A1L14 # A1L24 & present_state.s8;
acc[1] = DFFEA(acc[1]_lut_out, GLOBAL(clock), reset, , , , );

--A1L7Q is acc[1]~1815 at LC1_F42
--operation mode is normal

A1L7Q = acc[1];


--A1L14 is acc~1775 at LC2_F42
--operation mode is normal

A1L14 = !A1L601 & (present_state.s7 & (mdr[1]) # !present_state.s7 & acc[1]);

--A1L27 is acc~1816 at LC2_F42
--operation mode is normal

A1L27 = !A1L601 & (present_state.s7 & (mdr[1]) # !present_state.s7 & acc[1]);


--F3_cs_buffer[1] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC2_F38
--operation mode is arithmetic

F3_cs_buffer[1] = A1L36 $ mdr[1] $ F3_cout[0];

--F3L31 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~137 at LC2_F38
--operation mode is arithmetic

F3L31 = A1L36 $ mdr[1] $ F3_cout[0];

--F3_cout[1] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[1] at LC2_F38
--operation mode is arithmetic

F3_cout[1] = CARRY(A1L36 & (mdr[1] # F3_cout[0]) # !A1L36 & mdr[1] & F3_cout[0]);


--F6_cs_buffer[2] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC2_F41
--operation mode is arithmetic

F6_cs_buffer[2] = A1L36 $ mdr[1] $ F6_cout[1];

--F6L31 is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~137 at LC2_F41
--operation mode is arithmetic

F6L31 = A1L36 $ mdr[1] $ F6_cout[1];

--F6_cout[2] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[2] at LC2_F41
--operation mode is arithmetic

F6_cout[2] = CARRY(A1L36 & (F6_cout[1] # !mdr[1]) # !A1L36 & !mdr[1] & F6_cout[1]);


--A1L24 is acc~1776 at LC4_F42
--operation mode is normal

A1L24 = A1L301 & (F3_cs_buffer[1]) # !A1L301 & !F6_cs_buffer[2] & A1L701;

--A1L37 is acc~1817 at LC4_F42
--operation mode is normal

A1L37 = A1L301 & (F3_cs_buffer[1]) # !A1L301 & !F6_cs_buffer[2] & A1L701;


--A1L34 is acc~1777 at LC6_F42
--operation mode is normal

A1L34 = A1L14 # A1L24 & present_state.s8;

--A1L47 is acc~1818 at LC6_F42
--operation mode is normal

A1L47 = A1L14 # A1L24 & present_state.s8;


--instr_reg[1] is instr_reg[1] at LC7_F31
--operation mode is normal

instr_reg[1]_lut_out = present_state.s2 & (mdr[1]) # !present_state.s2 & instr_reg[1];
instr_reg[1] = DFFEA(instr_reg[1]_lut_out, GLOBAL(clock), reset, , , , );

--A1L941Q is instr_reg[1]~48 at LC7_F31
--operation mode is normal

A1L941Q = instr_reg[1];


--A1L5371 is sysbus~2732 at LC6_F31
--operation mode is normal

A1L5371 = present_state.s3 & (present_state.s2 & (mdr[1]) # !present_state.s2 & instr_reg[1]);

--A1L4571 is sysbus~2766 at LC6_F31
--operation mode is normal

A1L4571 = present_state.s3 & (present_state.s2 & (mdr[1]) # !present_state.s2 & instr_reg[1]);


--G1_q[1] is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[1] at LC2_F45
--operation mode is clrb_cntr

G1_q[1]_lut_out = ((G1_q[1] $ (!present_state.s0 & G1L3) & A1L6761) # (mdr[1] & !A1L6761)) & VCC;
G1_q[1] = DFFEA(G1_q[1]_lut_out, GLOBAL(clock), reset, , , , );

--G1L51Q is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[1]~1 at LC2_F45
--operation mode is clrb_cntr

G1L51Q = G1_q[1];

--G1L5 is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT at LC2_F45
--operation mode is clrb_cntr

G1L5 = CARRY(G1_q[1] & (G1L3));


--A1L6371 is sysbus~2733 at LC8_F31
--operation mode is normal

A1L6371 = !present_state.s3 & (present_state.s0 & (sysbus[1]) # !present_state.s0 & G1_q[1]);

--A1L5571 is sysbus~2767 at LC8_F31
--operation mode is normal

A1L5571 = !present_state.s3 & (present_state.s0 & (sysbus[1]) # !present_state.s0 & G1_q[1]);


--A1L7371 is sysbus~2734 at LC5_F33
--operation mode is normal

A1L7371 = present_state.s4 & (A1L34) # !present_state.s4 & (A1L6371 # A1L5371);

--A1L6571 is sysbus~2768 at LC5_F33
--operation mode is normal

A1L6571 = present_state.s4 & (A1L34) # !present_state.s4 & (A1L6371 # A1L5371);


--A1L342 is mdr~2406 at LC8_F33
--operation mode is normal

A1L342 = A1L242 # !A1L1371 & A1L7371 & present_state.s4;

--A1L072 is mdr~2443 at LC8_F33
--operation mode is normal

A1L072 = A1L242 # !A1L1371 & A1L7371 & present_state.s4;


--mdr[2] is mdr[2] at LC1_F49
--operation mode is normal

mdr[2]_lut_out = A1L542 # !A1L1371 & A1L0471 & present_state.s4;
mdr[2] = DFFEA(mdr[2]_lut_out, GLOBAL(clock), reset, , , , );

--A1L602Q is mdr[2]~2444 at LC1_F49
--operation mode is normal

A1L602Q = mdr[2];


--mem[10][2] is mem[10][2] at LC1_F28
--operation mode is normal

mem[10][2]_lut_out = mdr[2];
mem[10][2] = DFFEA(mem[10][2]_lut_out, GLOBAL(clock), reset, , A1L184, , );

--A1L784Q is mem[10][2]~866 at LC1_F28
--operation mode is normal

A1L784Q = mem[10][2];


--mem[9][2] is mem[9][2] at LC2_F28
--operation mode is normal