cpu.fit.eqn

说明：cpuyuanma1是硬布线控制器源代码

A1L932 = A1L732 # A1L832 & A1L629;

--A1L662 is mdr~2438 at LC1_F27
--operation mode is normal

A1L662 = A1L732 # A1L832 & A1L629;


--acc[0] is acc[0] at LC3_F39
--operation mode is normal

acc[0]_lut_out = A1L83 # A1L93 & present_state.s8;
acc[0] = DFFEA(acc[0]_lut_out, GLOBAL(clock), reset, , , , );

--A1L5Q is acc[0]~1811 at LC3_F39
--operation mode is normal

A1L5Q = acc[0];


--op[1] is op[1] at LC7_G45
--operation mode is normal

op[1]_lut_out = present_state.s2 & mdr[6] # !present_state.s2 & (instr_reg[6]);
op[1] = DFFEA(op[1]_lut_out, GLOBAL(clock), , , reset, , );

--A1L7361Q is op[1]~121 at LC7_G45
--operation mode is normal

A1L7361Q = op[1];


--op[2] is op[2] at LC6_F44
--operation mode is normal

op[2]_lut_out = present_state.s2 & mdr[7] # !present_state.s2 & (instr_reg[7]);
op[2] = DFFEA(op[2]_lut_out, GLOBAL(clock), , , reset, , );

--A1L9361Q is op[2]~122 at LC6_F44
--operation mode is normal

A1L9361Q = op[2];


--A1L601 is ALU_sub~29 at LC7_F40
--operation mode is normal

A1L601 = !op[2] & op[1] & present_state.s8;

--A1L801 is ALU_sub~31 at LC7_F40
--operation mode is normal

A1L801 = !op[2] & op[1] & present_state.s8;


--A1L83 is acc~1772 at LC6_F39
--operation mode is normal

A1L83 = !A1L601 & (present_state.s7 & (mdr[0]) # !present_state.s7 & acc[0]);

--A1L96 is acc~1812 at LC6_F39
--operation mode is normal

A1L96 = !A1L601 & (present_state.s7 & (mdr[0]) # !present_state.s7 & acc[0]);


--F3_cs_buffer[0] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0] at LC1_F38
--operation mode is arithmetic

F3_cs_buffer[0] = A1L26 $ mdr[0];

--F3L11 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~136 at LC1_F38
--operation mode is arithmetic

F3L11 = A1L26 $ mdr[0];

--F3_cout[0] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[0] at LC1_F38
--operation mode is arithmetic

F3_cout[0] = CARRY(A1L26 & mdr[0]);


--F6_cs_buffer[1] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC1_F41
--operation mode is arithmetic

F6_cs_buffer[1] = A1L26 $ mdr[0];

--F6L11 is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~136 at LC1_F41
--operation mode is arithmetic

F6L11 = A1L26 $ mdr[0];

--F6_cout[1] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[1] at LC1_F41
--operation mode is arithmetic

F6_cout[1] = CARRY(A1L26 # !mdr[0]);


--op[0] is op[0] at LC2_F44
--operation mode is normal

op[0]_lut_out = present_state.s2 & mdr[5] # !present_state.s2 & (instr_reg[5]);
op[0] = DFFEA(op[0]_lut_out, GLOBAL(clock), , , reset, , );

--A1L5361Q is op[0]~123 at LC2_F44
--operation mode is normal

A1L5361Q = op[0];


--A1L701 is ALU_sub~30 at LC4_F44
--operation mode is normal

A1L701 = !op[2] & op[1] & present_state.s8 & op[0];

--A1L901 is ALU_sub~32 at LC4_F44
--operation mode is normal

A1L901 = !op[2] & op[1] & present_state.s8 & op[0];


--A1L301 is ALU_add~12 at LC1_F44
--operation mode is normal

A1L301 = !op[2] & !op[0] & op[1] & present_state.s8;

--A1L401 is ALU_add~13 at LC1_F44
--operation mode is normal

A1L401 = !op[2] & !op[0] & op[1] & present_state.s8;


--A1L93 is acc~1773 at LC8_F39
--operation mode is normal

A1L93 = A1L301 & (F3_cs_buffer[0]) # !A1L301 & A1L701 & F6_cs_buffer[1];

--A1L07 is acc~1813 at LC8_F39
--operation mode is normal

A1L07 = A1L301 & (F3_cs_buffer[0]) # !A1L301 & A1L701 & F6_cs_buffer[1];


--A1L04 is acc~1774 at LC2_F39
--operation mode is normal

A1L04 = A1L83 # A1L93 & present_state.s8;

--A1L17 is acc~1814 at LC2_F39
--operation mode is normal

A1L17 = A1L83 # A1L93 & present_state.s8;


--instr_reg[0] is instr_reg[0] at LC1_F5
--operation mode is normal

instr_reg[0]_lut_out = present_state.s2 & (mdr[0]) # !present_state.s2 & instr_reg[0];
instr_reg[0] = DFFEA(instr_reg[0]_lut_out, GLOBAL(clock), reset, , , , );

--A1L741Q is instr_reg[0]~47 at LC1_F5
--operation mode is normal

A1L741Q = instr_reg[0];


--A1L2371 is sysbus~2728 at LC8_F5
--operation mode is normal

A1L2371 = present_state.s3 & (present_state.s2 & (mdr[0]) # !present_state.s2 & instr_reg[0]);

--A1L1571 is sysbus~2763 at LC8_F5
--operation mode is normal

A1L1571 = present_state.s3 & (present_state.s2 & (mdr[0]) # !present_state.s2 & instr_reg[0]);


--G1_q[0] is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[0] at LC1_F45
--operation mode is clrb_cntr

G1_q[0]_lut_out = ((present_state.s0 $ !G1_q[0] & A1L6761) # (mdr[0] & !A1L6761)) & VCC;
G1_q[0] = DFFEA(G1_q[0]_lut_out, GLOBAL(clock), reset, , , , );

--G1L31Q is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[0]~0 at LC1_F45
--operation mode is clrb_cntr

G1L31Q = G1_q[0];

--G1L3 is lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT at LC1_F45
--operation mode is clrb_cntr

G1L3 = CARRY(G1_q[0]);


--A1L3371 is sysbus~2729 at LC6_F45
--operation mode is normal

A1L3371 = !present_state.s3 & (present_state.s0 & (sysbus[0]) # !present_state.s0 & G1_q[0]);

--A1L2571 is sysbus~2764 at LC6_F45
--operation mode is normal

A1L2571 = !present_state.s3 & (present_state.s0 & (sysbus[0]) # !present_state.s0 & G1_q[0]);


--A1L4371 is sysbus~2730 at LC5_F39
--operation mode is normal

A1L4371 = present_state.s4 & (A1L04) # !present_state.s4 & (A1L3371 # A1L2371);

--A1L3571 is sysbus~2765 at LC5_F39
--operation mode is normal

A1L3571 = present_state.s4 & (A1L04) # !present_state.s4 & (A1L3371 # A1L2371);


--A1L042 is mdr~2403 at LC8_F27
--operation mode is normal

A1L042 = A1L932 # !A1L1371 & present_state.s4 & A1L4371;

--A1L762 is mdr~2439 at LC8_F27
--operation mode is normal

A1L762 = A1L932 # !A1L1371 & present_state.s4 & A1L4371;


--A1L0961 is reduce_or~6 at LC3_F34
--operation mode is normal

A1L0961 = present_state.s2 # present_state.s7 # present_state.s8 # present_state.s9;

--A1L2071 is reduce_or~73 at LC3_F34
--operation mode is normal

A1L2071 = present_state.s2 # present_state.s7 # present_state.s8 # present_state.s9;


--mdr[1] is mdr[1] at LC4_F33
--operation mode is normal

mdr[1]_lut_out = A1L242 # !A1L1371 & A1L7371 & present_state.s4;
mdr[1] = DFFEA(mdr[1]_lut_out, GLOBAL(clock), reset, , , , );

--A1L402Q is mdr[1]~2440 at LC4_F33
--operation mode is normal

A1L402Q = mdr[1];


--mem[6][1] is mem[6][1] at LC3_I29
--operation mode is normal

mem[6][1]_lut_out = mdr[1];
mem[6][1] = DFFEA(mem[6][1]_lut_out, GLOBAL(clock), reset, , A1L504, , );

--A1L904Q is mem[6][1]~834 at LC3_I29
--operation mode is normal

A1L904Q = mem[6][1];


--mem[5][1] is mem[5][1] at LC4_I29
--operation mode is normal

mem[5][1]_lut_out = !mdr[1];
mem[5][1] = DFFEA(mem[5][1]_lut_out, GLOBAL(clock), reset, , A1L683, , );

--A1L093Q is mem[5][1]~835 at LC4_I29
--operation mode is normal

A1L093Q = mem[5][1];


--mem[4][1] is mem[4][1] at LC5_I29
--operation mode is normal

mem[4][1]_lut_out = !mdr[1];
mem[4][1] = DFFEA(mem[4][1]_lut_out, GLOBAL(clock), reset, , A1L763, , );

--A1L173Q is mem[4][1]~836 at LC5_I29
--operation mode is normal

A1L173Q = mem[4][1];


--A1L729 is Mux~1893 at LC6_I29
--operation mode is normal

A1L729 = mar[0] & (mar[1] # !mem[5][1]) # !mar[0] & !mem[4][1] & (!mar[1]);

--A1L6821 is Mux~2288 at LC6_I29
--operation mode is normal

A1L6821 = mar[0] & (mar[1] # !mem[5][1]) # !mar[0] & !mem[4][1] & (!mar[1]);


--mem[7][1] is mem[7][1] at LC7_I29
--operation mode is normal

mem[7][1]_lut_out = mdr[1];
mem[7][1] = DFFEA(mem[7][1]_lut_out, GLOBAL(clock), reset, , A1L424, , );

--A1L824Q is mem[7][1]~837 at LC7_I29
--operation mode is normal

A1L824Q = mem[7][1];


--A1L829 is Mux~1894 at LC1_I29
--operation mode is normal

A1L829 = A1L729 & (mem[7][1] # !mar[1]) # !A1L729 & (mar[1] & mem[6][1]);

--A1L7821 is Mux~2289 at LC1_I29
--operation mode is normal

A1L7821 = A1L729 & (mem[7][1] # !mar[1]) # !A1L729 & (mar[1] & mem[6][1]);


--mem[9][1] is mem[9][1] at LC1_F12
--operation mode is normal

mem[9][1]_lut_out = mdr[1];
mem[9][1] = DFFEA(mem[9][1]_lut_out, GLOBAL(clock), reset, , A1L264, , );

--A1L664Q is mem[9][1]~838 at LC1_F12
--operation mode is normal

A1L664Q = mem[9][1];


--mem[10][1] is mem[10][1] at LC3_F12
--operation mode is normal

mem[10][1]_lut_out = mdr[1];
mem[10][1] = DFFEA(mem[10][1]_lut_out, GLOBAL(clock), reset, , A1L184, , );

--A1L584Q is mem[10][1]~839 at LC3_F12
--operation mode is normal

A1L584Q = mem[10][1];


--mem[8][1] is mem[8][1] at LC5_F12
--operation mode is normal

mem[8][1]_lut_out = mdr[1];
mem[8][1] = DFFEA(mem[8][1]_lut_out, GLOBAL(clock), reset, , A1L344, , );

--A1L744Q is mem[8][1]~840 at LC5_F12
--operation mode is normal

A1L744Q = mem[8][1];


--A1L929 is Mux~1895 at LC6_F12
--operation mode is normal

A1L929 = mar[1] & (mem[10][1] # mar[0]) # !mar[1] & mem[8][1] & (!mar[0]);

--A1L8821 is Mux~2290 at LC6_F12
--operation mode is normal

A1L8821 = mar[1] & (mem[10][1] # mar[0]) # !mar[1] & mem[8][1] & (!mar[0]);


--mem[11][1] is mem[11][1] at LC7_F12
--operation mode is normal

mem[11][1]_lut_out = mdr[1];
mem[11][1] = DFFEA(mem[11][1]_lut_out, GLOBAL(clock), reset, , A1L005, , );

--A1L405Q is mem[11][1]~841 at LC7_F12
--operation mode is normal

A1L405Q = mem[11][1];


--A1L039 is Mux~1896 at LC2_F12
--operation mode is normal

A1L039 = A1L929 & (mem[11][1] # !mar[0]) # !A1L929 & (mar[0] & mem[9][1]);

--A1L9821 is Mux~2291 at LC2_F12
--operation mode is normal

A1L9821 = A1L929 & (mem[11][1] # !mar[0]) # !A1L929 & (mar[0] & mem[9][1]);


--mem[1][1] is mem[1][1] at LC1_F8
--operation mode is normal

mem[1][1]_lut_out = mdr[1];
mem[1][1] = DFFEA(mem[1][1]_lut_out, GLOBAL(clock), reset, , A1L013, , );

--A1L413Q is mem[1][1]~842 at LC1_F8
--operation mode is normal

A1L413Q = mem[1][1];


--mem[2][1] is mem[2][1] at LC2_F8
--operation mode is normal

mem[2][1]_lut_out = !mdr[1];
mem[2][1] = DFFEA(mem[2][1]_lut_out, GLOBAL(clock), reset, , A1L923, , );

--A1L333Q is mem[2][1]~843 at LC2_F8
--operation mode is normal

A1L333Q = mem[2][1];


--mem[0][1] is mem[0][1] at LC5_F8
--operation mode is normal

mem[0][1]_lut_out = mdr[1];
mem[0][1] = DFFEA(mem[0][1]_lut_out, GLOBAL(clock), reset, , A1L192, , );

--A1L592Q is mem[0][1]~844 at LC5_F8
--operation mode is normal

A1L592Q = mem[0][1];


--A1L139 is Mux~1897 at LC6_F8
--operation mode is normal

A1L139 = mar[1] & (mar[0] # !mem[2][1]) # !mar[1] & mem[0][1] & (!mar[0]);

--A1L0921 is Mux~2292 at LC6_F8
--operation mode is normal

A1L0921 = mar[1] & (mar[0] # !mem[2][1]) # !mar[1] & mem[0][1] & (!mar[0]);


--mem[3][1] is mem[3][1] at LC7_F8
--operation mode is normal

mem[3][1]_lut_out = !mdr[1];
mem[3][1] = DFFEA(mem[3][1]_lut_out, GLOBAL(clock), reset, , A1L843, , );

--A1L253Q is mem[3][1]~845 at LC7_F8
--operation mode is normal

A1L253Q = mem[3][1];


--A1L239 is Mux~1898 at LC4_F8
--operation mode is normal

A1L239 = A1L139 & (!mar[0] # !mem[3][1]) # !A1L139 & (mar[0] & mem[1][1]);

--A1L1921 is Mux~2293 at LC4_F8
--operation mode is normal

A1L1921 = A1L139 & (!mar[0] # !mem[3][1]) # !A1L139 & (mar[0] & mem[1][1]);


--A1L339 is Mux~1899 at LC2_F9
--operation mode is normal

A1L339 = mar[3] & (A1L039 # mar[2]) # !mar[3] & A1L239 & (!mar[2]);

--A1L2921 is Mux~2294 at LC2_F9
--operation mode is normal

A1L2921 = mar[3] & (A1L039 # mar[2]) # !mar[3] & A1L239 & (!mar[2]);


--mem[14][1] is mem[14][1] at LC3_F18
--operation mode is normal

mem[14][1]_lut_out = mdr[1];
mem[14][1] = DFFEA(mem[14][1]_lut_out, GLOBAL(clock), reset, , A1L755, , );

--A1L165Q is mem[14][1]~846 at LC3_F18
--operation mode is normal

A1L165Q = mem[14][1];


--mem[13][1] is mem[13][1] at LC4_F18
--operation mode is normal

mem[13][1]_lut_out = mdr[1];
mem[13][1] = DFFEA(mem[13][1]_lut_out, GLOBAL(clock), reset, , A1L835, , );

--A1L245Q is mem[13][1]~847 at LC4_F18
--operation mode is normal

A1L245Q = mem[13][1];


--mem[12][1] is mem[12][1] at LC5_F18
--operation mode is normal

mem[12][1]_lut_out = mdr[1];
mem[12][1] = DFFEA(mem[12][1]_lut_out, GLOBAL(clock), reset, , A1L915, , );

--A1L325Q is mem[12][1]~848 at LC5_F18
--operation mode is normal

A1L325Q = mem[12][1];


--A1L439 is Mux~1900 at LC6_F18
--operation mode is normal

A1L439 = mar[0] & (mem[13][1] # mar[1]) # !mar[0] & mem[12][1] & (!mar[1]);

--A1L3921 is Mux~2295 at LC6_F18
--operation mode is normal

A1L3921 = mar[0] & (mem[13][1] # mar[1]) # !mar[0] & mem[12][1] & (!mar[1]);


--mem[15][1] is mem[15][1] at LC7_F18
--operation mode is normal

mem[15][1]_lut_out = mdr[1];
mem[15][1] = DFFEA(mem[15][1]_lut_out, GLOBAL(clock), reset, , A1L675, , );

--A1L085Q is mem[15][1]~849 at LC7_F18
--operation mode is normal