singt1.map.rpt

采用vhdl语言编程

;             |lpm_shiftreg:trigger_condition_deserialize|                                          ; 24 (24)     ; 24           ; 0           ; 0    ; 0            ; 0 (0)        ; 24 (24)           ; 0 (0)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize                                                           ;
;             |sld_mbpmg:\trigger_modules_gen:0:trigger_match|                                      ; 24 (0)      ; 16           ; 0           ; 0    ; 0            ; 8 (0)        ; 8 (0)             ; 8 (0)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match                                                       ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|                            ; 3 (3)       ; 2            ; 0           ; 0    ; 0            ; 1 (1)        ; 1 (1)             ; 1 (1)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1 ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|                            ; 3 (3)       ; 2            ; 0           ; 0    ; 0            ; 1 (1)        ; 1 (1)             ; 1 (1)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1 ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|                            ; 3 (3)       ; 2            ; 0           ; 0    ; 0            ; 1 (1)        ; 1 (1)             ; 1 (1)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1 ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|                            ; 3 (3)       ; 2            ; 0           ; 0    ; 0            ; 1 (1)        ; 1 (1)             ; 1 (1)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1 ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|                            ; 3 (3)       ; 2            ; 0           ; 0    ; 0            ; 1 (1)        ; 1 (1)             ; 1 (1)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1 ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|                            ; 3 (3)       ; 2            ; 0           ; 0    ; 0            ; 1 (1)        ; 1 (1)             ; 1 (1)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1 ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|                            ; 3 (3)       ; 2            ; 0           ; 0    ; 0            ; 1 (1)        ; 1 (1)             ; 1 (1)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1 ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|                            ; 3 (3)       ; 2            ; 0           ; 0    ; 0            ; 1 (1)        ; 1 (1)             ; 1 (1)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1 ;
;          |sld_ela_level_seq_mgr:ela_level_seq_mgr|                                                ; 8 (8)       ; 2            ; 0           ; 0    ; 0            ; 6 (6)        ; 0 (0)             ; 2 (2)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr                                                                                                                                                     ;
;          |sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|                            ; 14 (1)      ; 13           ; 0           ; 0    ; 0            ; 1 (1)        ; 0 (0)             ; 13 (0)           ; 13 (0)          ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1                                                                                                                                 ;
;             |lpm_counter:post_trigger_counter|                                                    ; 13 (0)      ; 13           ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 13 (0)           ; 13 (0)          ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter                                                                                                ;
;                |cntr_j9j:auto_generated|                                                          ; 13 (13)     ; 13           ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 13 (13)          ; 13 (13)         ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|lpm_counter:post_trigger_counter|cntr_j9j:auto_generated                                                                        ;
;          |sld_ela_seg_state_machine:sm2|                                                          ; 4 (4)       ; 3            ; 0           ; 0    ; 0            ; 1 (1)        ; 2 (2)             ; 1 (1)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2                                                                                                                                                               ;
;          |sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|                         ; 24 (2)      ; 14           ; 0           ; 0    ; 0            ; 10 (1)       ; 0 (0)             ; 14 (1)           ; 13 (0)          ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr                                                                                                                              ;
;             |lpm_compare:\non_zero_sample_depth_gen:segment_addr_compare|                         ; 9 (0)       ; 0            ; 0           ; 0    ; 0            ; 9 (0)        ; 0 (0)             ; 0 (0)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_compare:\non_zero_sample_depth_gen:segment_addr_compare                                                                  ;
;                |cmpr_inh:auto_generated|                                                          ; 9 (9)       ; 0            ; 0           ; 0    ; 0            ; 9 (9)        ; 0 (0)             ; 0 (0)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_compare:\non_zero_sample_depth_gen:segment_addr_compare|cmpr_inh:auto_generated                                          ;
;             |lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|                         ; 13 (0)      ; 13           ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 13 (0)           ; 13 (0)          ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter                                                                  ;
;                |cntr_iii:auto_generated|                                                          ; 13 (13)     ; 13           ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 13 (13)          ; 13 (13)         ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_iii:auto_generated                                          ;
;          |sld_ela_state_machine:sm1|                                                              ; 5 (5)       ; 3            ; 0           ; 0    ; 0            ; 2 (2)        ; 1 (1)             ; 2 (2)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1                                                                                                                                                                   ;
;       |sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|          ; 56 (5)      ; 51           ; 0           ; 0    ; 0            ; 5 (5)        ; 0 (0)             ; 51 (0)           ; 16 (0)          ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst                                                                                                                                        ;
;          |lpm_counter:\adv_point_3_and_more:advance_pointer_counter|                              ; 3 (0)       ; 3            ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 3 (0)            ; 3 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter                                                                              ;
;             |cntr_udh:auto_generated|                                                             ; 3 (3)       ; 3            ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 3 (3)            ; 3 (3)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_udh:auto_generated                                                      ;
;          |lpm_counter:read_pointer_counter|                                                       ; 13 (0)      ; 13           ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 13 (0)           ; 13 (0)          ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter                                                                                                       ;
;             |cntr_n8i:auto_generated|                                                             ; 13 (13)     ; 13           ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 13 (13)          ; 13 (13)         ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_n8i:auto_generated                                                                               ;
;          |lpm_shiftreg:info_data_shift_out|                                                       ; 27 (27)     ; 27           ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 27 (27)          ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out                                                                                                       ;
;          |lpm_shiftreg:ram_data_shift_out|                                                        ; 8 (8)       ; 8            ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 8 (8)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out                                                                                                        ;
;       |sld_rom_sr:crc_rom_sr|                                                                     ; 17 (17)     ; 8            ; 0           ; 0    ; 0            ; 9 (9)        ; 0 (0)             ; 8 (8)            ; 0 (0)           ; 0 (0)      ; |Block1|sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr                                                                                                                                                                                                   ;
+---------------------------------------------------------------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary                                                                                                                                                                                                          ;
+-------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+-------------+
; Name                                                                                                                          ; Type ; Mode             ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size  ; MIF         ;
+-------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+-------------+
; singt1:inst|data_rom:u1|altsyncram:altsyncram_component|altsyncram_fo51:auto_generated|altsyncram_m372:altsyncram1|ALTSYNCRAM ; AUTO ; True Dual Port   ; 64           ; 8            ; 64           ; 8            ; 512   ; ./singt.mif ;
; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ALTSYNCRAM      ; AUTO ; Simple Dual Port ; 8192         ; 8            ; 8192         ; 8            ; 65536 ; None        ;
+-------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+-------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Removed During Synthesis                                                                                                                                                                                                  ;
+---------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Register name                               ; Reason for Removal                                                                                                                                                                    ;
+---------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; auto_signaltap_0/acq_data_in_reg[7]         ; Merged with auto_signaltap_0/acq_trigger_in_reg[7]                                                                                                                                    ;
; auto_signaltap_0/acq_data_in_pipe_reg[1][7] ; Merged with auto_signaltap_0/ela_control/\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm/\trigger_modules_gen:0:trigger_match/\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1/holdff ;
; auto_signaltap_0/acq_data_in_reg[0]         ; Merged with auto_signaltap_0/acq_trigger_in_reg[0]                                                                                                                                    ;
; auto_signaltap_0/acq_data_in_pipe_reg[1][0] ; Merged with auto_signaltap_0/ela_control/\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm/\trigger_modules_gen:0:trigger_match/\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1/holdff ;
; auto_signaltap_0/acq_data_in_reg[1]         ; Merged with auto_signaltap_0/acq_trigger_in_reg[1]                                                                                                                                    ;
; auto_signaltap_0/acq_data_in_pipe_reg[1][1] ; Merged with auto_signaltap_0/ela_control/\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm/\trigger_modules_gen:0:trigger_match/\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1/holdff ;
; auto_signaltap_0/acq_data_in_reg[2]         ; Merged with auto_signaltap_0/acq_trigger_in_reg[2]                                                                                                                                    ;
; auto_signaltap_0/acq_data_in_pipe_reg[1][2] ; Merged with auto_signaltap_0/ela_control/\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm/\trigger_modules_gen:0:trigger_match/\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1/holdff ;
; auto_signaltap_0/acq_data_in_reg[3]         ; Merged with auto_signaltap_0/acq_trigger_in_reg[3]                                                                                                                                    ;
; auto_signaltap_0/acq_data_in_pipe_reg[1][3] ; Merged with auto_signaltap_0/ela_control/\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm/\trigger_modules_gen:0:trigger_match/\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1/holdff ;
; auto_signaltap_0/acq_data_in_reg[4]         ; Merged with auto_signaltap_0/acq_trigger_in_reg[4]                                                                                                                                    ;
; auto_signaltap_0/acq_data_in_pipe_reg[1][4] ; Merged with auto_signaltap_0/ela_control/\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm/\trigger_modules_gen:0:trigger_match/\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1/holdff ;
; auto_signaltap_0/acq_data_in_reg[6]         ; Merged with auto_signaltap_0/acq_trigger_in_reg[6]                                                                                                                                    ;
; auto_signaltap_0/acq_data_in_pipe_reg[1][6] ; Merged with auto_signaltap_0/ela_control/\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm/\trigger_modules_gen:0:trigger_match/\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1/holdff ;
; auto_signaltap_0/acq_data_in_reg[5]         ; Merged with auto_signaltap_0/acq_trigger_in_reg[5]                                                                                                                                    ;
; auto_signaltap_0/acq_data_in_pipe_reg[1][5] ; Merged with auto_signaltap_0/e