prev_cmp_chk.map.qmsg

来自「本设计是一个序列检测器」· QMSG 代码 · 共 12 行

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.1 Build 156 04/30/2007 SJ Full Version " "Info: Version 7.1 Build 156 04/30/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Nov 14 09:05:16 2007 " "Info: Processing started: Wed Nov 14 09:05:16 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off CHK -c CHK " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off CHK -c CHK" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "CHK.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file CHK.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 CHK-behav " "Info: Found design unit 1: CHK-behav" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 CHK " "Info: Found entity 1: CHK" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "CHK " "Info: Elaborating entity \"CHK\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|CHK\|CURRENT_STATE 5 " "Info: State machine \"\|CHK\|CURRENT_STATE\" contains 5 states" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0 "" 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|CHK\|CURRENT_STATE " "Info: Selected Auto state machine encoding method for state machine \"\|CHK\|CURRENT_STATE\"" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0 "" 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|CHK\|CURRENT_STATE " "Info: Encoding result for state machine \"\|CHK\|CURRENT_STATE\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "5 " "Info: Completed encoding using 5 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "CURRENT_STATE.st4 " "Info: Encoded state bit \"CURRENT_STATE.st4\"" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "CURRENT_STATE.st3 " "Info: Encoded state bit \"CURRENT_STATE.st3\"" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "CURRENT_STATE.st2 " "Info: Encoded state bit \"CURRENT_STATE.st2\"" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "CURRENT_STATE.st1 " "Info: Encoded state bit \"CURRENT_STATE.st1\"" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "CURRENT_STATE.st0 " "Info: Encoded state bit \"CURRENT_STATE.st0\"" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|CHK\|CURRENT_STATE.st0 00000 " "Info: State \"\|CHK\|CURRENT_STATE.st0\" uses code string \"00000\"" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|CHK\|CURRENT_STATE.st1 00011 " "Info: State \"\|CHK\|CURRENT_STATE.st1\" uses code string \"00011\"" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|CHK\|CURRENT_STATE.st2 00101 " "Info: State \"\|CHK\|CURRENT_STATE.st2\" uses code string \"00101\"" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|CHK\|CURRENT_STATE.st3 01001 " "Info: State \"\|CHK\|CURRENT_STATE.st3\" uses code string \"01001\"" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|CHK\|CURRENT_STATE.st4 10001 " "Info: State \"\|CHK\|CURRENT_STATE.st4\" uses code string \"10001\"" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0}  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "1 1 " "Info: 1 registers lost all their fanouts during netlist optimizations. The first 1 are displayed below." { { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "CURRENT_STATE.st1 " "Info: Register \"CURRENT_STATE.st1\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0}  } {  } 0 0 "%1!d! registers lost all their fanouts during netlist optimizations. The first %2!d! are displayed below." 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "9 " "Info: Implemented 9 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "3 " "Info: Implemented 3 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "1 " "Info: Implemented 1 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "5 " "Info: Implemented 5 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "145 " "Info: Allocated 145 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed Nov 14 09:05:19 2007 " "Info: Processing ended: Wed Nov 14 09:05:19 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}