chk.tan.qmsg

来自「本设计是一个序列检测器」· QMSG 代码 · 共 16 行 · 第 1/4 页

{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0}
{ "Warning" "WTDB_ANALYZE_COMB_LATCHES" "" "Warning: Timing Analysis is analyzing one or more combinational loops as latches" { { "Warning" "WTDB_COMB_LATCH_NODE" "F\$latch " "Warning: Node \"F\$latch\" is a latch" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 21 0 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0}  } {  } 0 0 "Timing Analysis is analyzing one or more combinational loops as latches" 0 0 "" 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "CLK " "Info: Assuming node \"CLK\" is an undefined clock" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 5 -1 0 } } { "d:/program files/quartus7.1/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/program files/quartus7.1/quartus/bin/Assignment Editor.qase" 1 { { 0 "CLK" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0} { "Info" "ITAN_NODE_MAP_TO_SPECIAL_CLK" "DaIN " "Info: Assuming node \"DaIN\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 6 -1 0 } }  } 0 0 "Assuming node \"%1!s!\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." 0 0 "" 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0 "" 0}
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "3 " "Warning: Found 3 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_GATED_CLK" "Selector3~3 " "Info: Detected gated clock \"Selector3~3\" as buffer" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 23 -1 0 } } { "d:/program files/quartus7.1/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/program files/quartus7.1/quartus/bin/Assignment Editor.qase" 1 { { 0 "Selector3~3" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "CURRENT_STATE.st3 " "Info: Detected ripple clock \"CURRENT_STATE.st3\" as buffer" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } } { "d:/program files/quartus7.1/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/program files/quartus7.1/quartus/bin/Assignment Editor.qase" 1 { { 0 "CURRENT_STATE.st3" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "CURRENT_STATE.st4 " "Info: Detected ripple clock \"CURRENT_STATE.st4\" as buffer" {  } { { "CHK.vhd" "" { Text "D:/Quartus/CHK/CHK.vhd" 12 -1 0 } } { "d:/program files/quartus7.1/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/program files/quartus7.1/quartus/bin/Assignment Editor.qase" 1 { { 0 "CURRENT_STATE.st4" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0 "" 0}