1013.smp_dump.txt

用verilog写的对ad0809的控制

State Machine - |ad0809|CS
Name CS.GET_DATA CS.CHECK_END CS.START_L CS.START_H CS.IDLE 
CS.IDLE 0 0 0 0 0 
CS.START_H 0 0 0 1 1 
CS.START_L 0 0 1 0 1 
CS.CHECK_END 0 1 0 0 1 
CS.GET_DATA 1 0 0 0 1 

State Machine - |ad0809|NS
Name NS.GET_DATA NS.CHECK_END NS.START_L NS.START_H NS.IDLE 
NS.IDLE 0 0 0 0 0 
NS.START_H 0 0 0 1 1 
NS.START_L 0 0 1 0 1 
NS.CHECK_END 0 1 0 0 1 
NS.GET_DATA 1 0 0 0 1 

State Machine - |ad0809|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|state
Name state.s10 state.s9 state.s8 state.s7 state.s6 state.s5 state.s4 state.s3 state.s2 state.s1 state.s0 
state.s0 0 0 0 0 0 0 0 0 0 0 0 
state.s1 0 0 0 0 0 0 0 0 0 1 1 
state.s2 0 0 0 0 0 0 0 0 1 0 1 
state.s3 0 0 0 0 0 0 0 1 0 0 1 
state.s4 0 0 0 0 0 0 1 0 0 0 1 
state.s5 0 0 0 0 0 1 0 0 0 0 1 
state.s6 0 0 0 0 1 0 0 0 0 0 1 
state.s7 0 0 0 1 0 0 0 0 0 0 1 
state.s8 0 0 1 0 0 0 0 0 0 0 1 
state.s9 0 1 0 0 0 0 0 0 0 0 1 
state.s10 1 0 0 0 0 0 0 0 0 0 1