prev_cmp_ad0809.map.qmsg

用verilog写的对ad0809的控制

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Oct 14 15:25:00 2008 " "Info: Processing started: Tue Oct 14 15:25:00 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off ad0809 -c ad0809 " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off ad0809 -c ad0809" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ad0809.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file ad0809.v" { { "Info" "ISGN_ENTITY_NAME" "1 ad0809 " "Info: Found entity 1: ad0809" {  } { { "ad0809.v" "" { Text "F:/72quartus/ADcontrol/ad0809.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "ad0809 " "Info: Elaborating entity \"ad0809\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 10 ad0809.v(32) " "Warning (10230): Verilog HDL assignment warning at ad0809.v(32): truncated value with size 32 to match size of target (10)" {  } { { "ad0809.v" "" { Text "F:/72quartus/ADcontrol/ad0809.v" 32 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd 7 2 " "Info: Found 7 design units, including 2 entities, in source file e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_signaltap_pack " "Info: Found design unit 1: sld_signaltap_pack" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" 62 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_signaltap_lib " "Info: Found design unit 2: sld_signaltap_lib" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" 70 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "3 sld_signaltap_lib-body " "Info: Found design unit 3: sld_signaltap_lib-body" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" 75 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "4 sld_signaltap-rtl " "Info: Found design unit 4: sld_signaltap-rtl" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" 229 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "5 sld_signaltap_impl-rtl " "Info: Found design unit 5: sld_signaltap_impl-rtl" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" 522 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_signaltap " "Info: Found entity 1: sld_signaltap" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" 131 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "2 sld_signaltap_impl " "Info: Found entity 2: sld_signaltap_impl" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_signaltap.vhd" 433 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera/c72/quartus/libraries/megafunctions/sld_ela_control.vhd 4 2 " "Info: Found 4 design units, including 2 entities, in source file e:/altera/c72/quartus/libraries/megafunctions/sld_ela_control.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_ela_control-rtl " "Info: Found design unit 1: sld_ela_control-rtl" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_ela_control.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_ela_control.vhd" 129 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_ela_basic_multi_level_trigger-rtl " "Info: Found design unit 2: sld_ela_basic_multi_level_trigger-rtl" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_ela_control.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_ela_control.vhd" 702 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_ela_control " "Info: Found entity 1: sld_ela_control" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_ela_control.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_ela_control.vhd" 71 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "2 sld_ela_basic_multi_level_trigger " "Info: Found entity 2: sld_ela_basic_multi_level_trigger" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_ela_control.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_ela_control.vhd" 669 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera/c72/quartus/libraries/megafunctions/LPM_SHIFTREG.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file e:/altera/c72/quartus/libraries/megafunctions/LPM_SHIFTREG.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_shiftreg " "Info: Found entity 1: lpm_shiftreg" {  } { { "LPM_SHIFTREG.tdf" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/LPM_SHIFTREG.tdf" 39 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera/c72/quartus/libraries/megafunctions/sld_mbpmg.vhd 4 2 " "Info: Found 4 design units, including 2 entities, in source file e:/altera/c72/quartus/libraries/megafunctions/sld_mbpmg.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_mbpmg-rtl " "Info: Found design unit 1: sld_mbpmg-rtl" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_mbpmg.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_mbpmg.vhd" 65 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_sbpmg-rtl " "Info: Found design unit 2: sld_sbpmg-rtl" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_mbpmg.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_mbpmg.vhd" 298 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_mbpmg " "Info: Found entity 1: sld_mbpmg" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_mbpmg.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_mbpmg.vhd" 44 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "2 sld_sbpmg " "Info: Found entity 2: sld_sbpmg" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_mbpmg.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_mbpmg.vhd" 277 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera/c72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file e:/altera/c72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_ela_trigger_flow_mgr-rtl " "Info: Found design unit 1: sld_ela_trigger_flow_mgr-rtl" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" 43 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_ela_trigger_flow_mgr " "Info: Found entity 1: sld_ela_trigger_flow_mgr" {  } { { "e:/altera/c72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" "" { Text "e:/altera/c72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd" 10 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}