byte_crc.tan.qmsg

来自「字节型CRC校验 采用verilog语言设计」· QMSG 代码 · 共 10 行 · 第 1/3 页

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Full Version " "Info: Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct 30 21:32:00 2008 " "Info: Processing started: Thu Oct 30 21:32:00 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off byte_crc -c byte_crc --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off byte_crc -c byte_crc --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "sig " "Info: Assuming node \"sig\" is an undefined clock" {  } { { "byte_crc.v" "" { Text "D:/altera/work2/byte_crc/byte_crc.v" 2 -1 0 } } { "d:/altera/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus/bin/Assignment Editor.qase" 1 { { 0 "sig" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0 "" 0 0}