proj.qsf

基于ep1c6的vhdl的lcd控制程序实例

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		Proj_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "4.2 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "23:01:08  APRIL 18, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION "5.0 SP2"
set_global_assignment -name VHDL_FILE ../src/char_ram.vhd
set_global_assignment -name VERILOG_FILE ../src/div16.v
set_global_assignment -name VHDL_FILE ../src/lcd.vhd
set_global_assignment -name BDF_FILE lcd_test.bdf
set_global_assignment -name CDF_FILE ../../S1_7sLED/Proj/7sLED.cdf

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_153 -to clk
set_location_assignment PIN_17 -to LCD_D[0]
set_location_assignment PIN_18 -to LCD_D[1]
set_location_assignment PIN_19 -to LCD_D[2]
set_location_assignment PIN_20 -to LCD_D[3]
set_location_assignment PIN_21 -to LCD_D[4]
set_location_assignment PIN_23 -to LCD_D[5]
set_location_assignment PIN_41 -to LCD_D[6]
set_location_assignment PIN_42 -to LCD_D[7]
set_location_assignment PIN_4 -to LCD_E
set_location_assignment PIN_2 -to LCD_RS
set_location_assignment PIN_3 -to LCD_RW
set_location_assignment PIN_131 -to SYS_RST

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PACKAGE PQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name TOP_LEVEL_ENTITY lcd_test
set_global_assignment -name USER_LIBRARIES "f:\\i2c_altera/"

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP1C6Q240C8
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS OUTPUT DRIVING AN UNSPECIFIED SIGNAL"
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

# Assembler Assignments
# =====================
set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION ON
set_global_assignment -name CYCLONE_CONFIGURATION_DEVICE EPCS1
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"

# Simulator Assignments
# =====================
set_global_assignment -name GLITCH_INTERVAL 1

# LogicLock Region Assignments
# ============================
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF