seg7led.map.summary

来自「Verilog HDL源码」· SUMMARY 代码 · 共 15 行

Analysis & Synthesis Status : Successful - Fri May 30 15:33:04 2008
Quartus II Version : 7.2 Build 175 11/20/2007 SP 1 SJ Full Version
Revision Name : seg7led
Top-level Entity Name : seg7led
Family : Cyclone III
Total logic elements : 95
    Total combinational functions : 95
    Dedicated logic registers : 64
Total registers : 64
Total pins : 14
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0