x444_to_422_to_444_preloadfcn.m

用于视频压缩编码中的RGB信号到色差信号变换的VHDL程序

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% Simulation pre start script to initialize %
%  simulink model xrgb_to_ycrcb_to_rgb.mdl  %
%                                           %
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%        Clean Up Workspace       %
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close all;  %close all open figure windows
clear all;  %clear all workspace variables


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%        Create/Open Image        %
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imfile='lena_color.jpg';   %file to be opened
debug=0                     %0 to use file, 1or2 for test patterns
%get image or debug
isize=128;
jsize=128;
intensity=255;
csize=3;
if (debug==1) %colorsquares
    image(1:jsize,1:ceil(isize/3),1)=intensity;
    image(1:ceil(jsize/3),1:isize,1)=intensity;
    image(1:jsize,isize,1)=0;
    image(ceil(jsize/3)+1:ceil(jsize/3*2),1:isize,2)=intensity;
    image(1:jsize,ceil(isize/3)+1:ceil(isize/3*2),2)=intensity;
    image(1:jsize,isize,2)=0;
    image(ceil(jsize/3*2)+1:jsize,1:isize,3)=intensity;
    image(1:jsize,ceil(isize/3*2)+1:isize,3)=intensity;
    image(1:jsize,isize,3)=0;
    past=find(image>intensity);
    image(past)=intensity;
    imshow (uint8(image));
    title('Original');
    image=double(image);
else %use image from file
    image=imread(imfile);
    imshow (uint8(image));
    title('Original');
    image=double(image);
end


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%     Convert Image to Vector     %
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fpga_input_red=[];
fpga_input_grn=[];
fpga_input_blu=[];
[height,width,depth]=size(image);
for j= 1:height
    fpga_input_red=[fpga_input_red image(j,:,1)]; %concat rows into single vector
    fpga_input_grn=[fpga_input_grn image(j,:,2)]; %concat rows into single vector
    fpga_input_blu=[fpga_input_blu image(j,:,3)]; %concat rows into single vector
end
image_size=height*width;

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% Bit Precision Control Variables %
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ZBT_addr_bits=21-2; %19 for MicroBlaze MultiMedia Board, 21 for WildCard-ii
Image_bits=ceil(log(max(max(image(:,:,1))))/log(2))    %number of bits used to represent a single input image pixel
c_resol=12;
o_resol=Image_bits;

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%          Time Variables         %
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System_Period=1;                    %input pixel sampling period
System_Frequency=1/System_Period;   %input pixel sampling frequency
over_latency=100;                   %arbitrary number to ensure all data has passed through the system
[null,sim_time]=size(fpga_input_red);
sim_time=sim_time*2+over_latency    %amount of time simulation should be run for
Final_delay=56-13+1+5; %unnecessary
Latency=20;                   %latency of read side in free running system.  This is used to 
                                    %automate the matrix viewer by only allowing valid data into 
                                    %the frame buffers.