📄 test_cast_remove.mdl
字号:
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "test_cast_remove"
Location [2, 78, 1022, 718]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Reference
Name " System Generator"
Tag "genX"
Ports []
Position [252, 13, 303, 63]
ShowName off
AttributesFormatString "System\\nGenerator"
UserDataPersistent on
UserData "DataTag0"
FontSize 10
SourceBlock "xbsIndex_r3/ System Generator"
SourceType "Xilinx System Generator"
xilinxfamily "Virtex2"
part "xc2v1000"
speed "-4"
package "bg575"
synthesis_tool "XST"
directory "./netlist"
testbench off
simulink_period "1"
sysclk_period "100"
incr_netlist off
trim_vbits "Everywhere in SubSystem"
dbl_ovrd "According to Block Masks"
core_generation "According to Block Masks"
run_coregen off
deprecated_control off
eval_field "0"
}
Block {
BlockType Reference
Name "Convert1"
Ports [1, 1]
Position [320, 205, 365, 235]
SourceBlock "xbsIndex_r3/Convert"
SourceType "Xilinx Converter Block"
arith_type "Unsigned"
n_bits "8"
bin_pt "0"
quantization "Truncate"
overflow "Saturate"
latency "0"
explicit_period off
period "1"
dbl_ovrd off
show_param off
inserted_by_tool off
xl_area "[0, 0, 0, 0, 0, 0, 0]"
xl_use_area off
}
Block {
BlockType Reference
Name "Gateway In"
Ports [1, 1]
Position [205, 209, 260, 231]
SourceBlock "xbsIndex_r3/Gateway In"
SourceType "Xilinx Gateway In"
arith_type "Signed (2's comp)"
n_bits "10"
bin_pt "0"
quantization "Truncate"
overflow "Wrap"
period "1"
timing_constraint "None"
locs_specified off
LOCs "{}"
needs_fixed_name off
dbl_ovrd off
show_param off
xl_area "[0, 0, 0, 0, 0, 0, 0]"
xl_use_area off
}
Block {
BlockType Reference
Name "Gateway Out"
Ports [1, 1]
Position [445, 209, 500, 231]
SourceBlock "xbsIndex_r3/Gateway Out"
SourceType "Xilinx Gateway Out"
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
needs_fixed_name off
show_param off
xl_area "[0, 0, 0, 0, 0, 0, 0]"
xl_use_area off
}
Block {
BlockType Reference
Name "Gateway Out1"
Ports [1, 1]
Position [445, 264, 500, 286]
SourceBlock "xbsIndex_r3/Gateway Out"
SourceType "Xilinx Gateway Out"
hdl_port on
timing_constraint "None"
locs_specified off
LOCs "{}"
needs_fixed_name off
show_param off
xl_area "[0, 0, 0, 0, 0, 0, 0]"
xl_use_area off
}
Block {
BlockType Reference
Name "Ramp"
Ports [0, 1]
Position [140, 205, 170, 235]
SourceBlock "simulink/Sources/Ramp"
SourceType "Ramp"
slope "1"
start "0"
X0 "0"
VectorParams1D on
}
Block {
BlockType Scope
Name "Scope"
Ports [2]
Position [570, 190, 620, 305]
Location [1, 56, 1025, 737]
Open off
NumInputPorts "2"
ZoomMode "yonly"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
axes2 "%<SignalLabel>"
}
List {
ListType SelectedSignals
axes1 ""
axes2 ""
}
YMin "-5~-5"
YMax "5~5"
DataFormat "StructureWithTime"
LimitDataPoints off
}
Line {
SrcBlock "Ramp"
SrcPort 1
DstBlock "Gateway In"
DstPort 1
}
Line {
SrcBlock "Gateway In"
SrcPort 1
Points [20, 0]
Branch {
DstBlock "Convert1"
DstPort 1
}
Branch {
Points [0, 55]
DstBlock "Gateway Out1"
DstPort 1
}
}
Line {
SrcBlock "Convert1"
SrcPort 1
DstBlock "Gateway Out"
DstPort 1
}
Line {
SrcBlock "Gateway Out"
SrcPort 1
DstBlock "Scope"
DstPort 1
}
Line {
SrcBlock "Gateway Out1"
SrcPort 1
DstBlock "Scope"
DstPort 2
}
}
}
MatData {
NumRecords 1
DataRecord {
Tag DataTag0
Data " %)30 . ^ @ 8 ( @ % "
"\" $ ! 0 % 0 !@ $ & <V%V960 . L @ 8 ("
" @ % \" $ ! 0 % 0 # $ 8 <VAA<F5D"
" 8V]M<&EL871I;VX #@ -@# & \" ( !0 @ ! 0 "
" $ !0 $ !, ! A0 &-O;7!I;&%T:6]N !C;VUP:6QA=&EO;E]L="
"70 <VEM=6QI;FM?<&5R:6]D &EN8W)?;F5T;&ES= !T<FEM7W9B:71S "
" 9&)L7V]V<F0 &1E<')E8V%T961?8V]N=')O; . 0 8 "
"( ! % \" $ ' 0 $ #@ '0 80!R &< 90!T #$"
" . 0 $ 8 ( @ % \" $ ! 0 % 0 !P "
" $ . :V5Y<P '9A;'5E<P X !X !@ @ ! 4 ( "
" 0 $ ! X !( !@ @ $ 4 ( 0 L ! "
" 0 6 2 !$ $P ( !. &4 = !L &D <P!T #@ ' & \" $ "
" !0 @ ! 0 $ #@ $ & \" 0 !0 "
" @ ! !P $ ! X !T &$ <@!G &4 = Q #@ # & \""
" 0 !0 @ ! 0 $ ! \" #$ . . 8 ( "
" ! % \" $ # 0 $ !@ &\\ 9@!F #@ & "
" & \" 0 !0 @ ! %P $ ! \"X !% '8 90!"
"R 'D =P!H &4 <@!E \" :0!N \" 4P!U &( 4P!Y ', = !E &T . 8 8 ( "
" ! % \" $ 8 0 $ , $$ 8P!C &\\ <@!D &D ;"
"@!G \" = !O \" 0@!L &\\ 8P!K \" 30!A ', :P!S X X !@ @ $ "
" 4 ( 0 , ! 0 & ;P!F &8 . > 0 8 ( "
" @ % \" $ ! 0 % 0 \" $ ( =&%R9V5T,0"
" . , 0 8 ( @ % \" $ ! 0 % 0 $ "
"$ # >&EL:6YX9F%M:6QY '!A<G0 !S<&5E9 <&%"
"C:V%G90 '-Y;G1H97-I<U]T;V]L !D:7)E8W1O<GD =&5S=&)E;F-H "
" '-Y<V-L:U]P97)I;V0 !C;W)E7V=E;F5R871I;VX <G5N7V-O<F5G96X &5V86Q?9"
"FEE;&0 !C;&]C:U]L;V, #@ $ & \" 0 !0 @ "
" ! !P $ ! X !6 &D <@!T &4 > R #@ $ & \" "
" 0 !0 @ ! \" $ ! ! !X &, ,@!V #$ , P # #"
"@ # & \" 0 !0 @ ! @ $ ! $ \"T - ."
" 0 8 ( ! % \" $ % 0 $ \"@ &("
" 9P U #< -0 . . 8 ( ! % \" $ # 0 "
" $ !@ %@ 4P!4 #@ $@ & \" 0 !0 @ ! "
" \"0 $ ! !( N \"\\ ;@!E '0 ; !I ', = . . 8 "
" ( ! % \" $ # 0 $ !@ &\\ 9@!F #@ "
" #@ & \" 0 !0 @ ! P $ ! 8 Q # "
", X !@ !@ @ $ 4 ( 0 !@ ! 0 P "
" 00!C &, ;P!R &0 :0!N &< ( !T &\\ ( !\" &P ;P!C &L ( !- &$ <P!K ', #@ #@ "
" & \" 0 !0 @ ! P $ ! 8 !O &8 9@ "
" X P !@ @ $ 4 ( 0 $ ! 0 @ P #"
"@ # & \" 0 !0 @ $ ! "
}
}
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -